Intel® 64 and IA-32 Architectures Optimization Reference Manual

64-BIT MODE CODING GUIDELINESAssembly/Compiler Coding Rule 65. (H impact, M generality) Use the 32-bitversions of instructions in 64-bit mode to reduce code size unless the 64-bit versionis necessary to access 64-bit data or additional registers.9.2.2 Use Extra Registers to Reduce Register Pressure64-bit mode makes 8 additional 64-bit general purpose registers and 8 additionalXMM registers available to applications. To access the additional registers, a singlebyte REX prefix is necessary. Using 8 additional registers can prevent the compilerfrom needing to spill values onto the stack.Note that the potential increase in code size, due to the REX prefix, can increasecache misses. This can work against the benefit of using extra registers to access thedata. When eight registers are sufficient for an algorithm, don’t use the registers thatrequire an REX prefix. This keeps the code size smaller.Assembly/Compiler Coding Rule 66. (M impact, MH generality) When theyare needed to reduce register pressure, use the 8 extra general purpose registersfor integer code and 8 extra XMM registers for floating-point or SIMD code.9.2.3 Use 64-Bit by 64-Bit Multiplies To Produce128-Bit Results Only When NecessaryInteger multiplies of 64-bit by 64-bit operands that produce a 128-bit result costmore than multiplies that produce a 64-bit result. The upper 64-bits of a result takelonger to compute than the lower 64 bits.If the compiler can determine at compile time that the result of a multiply will notexceed 64 bits, then the compiler should generate the multiply instruction thatproduces a 64-bit result. If the compiler or assembly programmer can not determinethat the result will be less than 64 bits, then a multiply that produces a 128-bit resultis necessary.Assembly/Compiler Coding Rule 67. (ML impact, M generality) Prefer 64-bitby 64-bit integer multiplies that produce 64-bit results over multiplies that produce128-bit results.9.2.4 Sign Extension to Full 64-BitsWhen in 64-bit mode, the architecture is optimized to sign-extend to 64 bits in asingle μop. In 64-bit mode, when the destination is 32 bits, the upper 32 bits must bezeroed.Zeroing the upper 32 bits requires an extra μop and is less optimal than signextending to 64 bits. While sign extending to 64 bits makes the instruction one bytelonger, it reduces the number of μops that the trace cache has to store, improvingperformance.9-2