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Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

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USING PERFORMANCE MONITORING EVENTSMetricMispredicted callsMispredictedconditionalsTable B-2. Performance Metrics - Branching (Contd.)DescriptionAll mispredictedindirect callsNumber ofmispredicted branchesthat are conditionaljumpsEvent Name or MetricExpressionretired_branch_typeretired_mispred_branch_typeEvent Mask ValueRequiredCALLCONDITIONALMetricPage Walk Miss ITLBITLB MissesTC FlushesLogical Processor 0Deliver ModeTable B-3. Performance Metrics - Trace Cache <strong>and</strong> Front EndDescriptionNumber of page walkrequests due to ITLBmissesNumber of ITLBlookups that result in amissPage Walk Miss ITLB isless speculative thanITLB Misses <strong>and</strong> is therecommendedalternative.Number of TC flushesCounter will counttwice for eachoccurrence. Divide thecount by two to getthe number of flushes.Number of cycles thatthe trace <strong>and</strong> deliveryengine (TDE) isdelivering tracesassociated with logicalprocessor 0,regardless of operatingmodes of TDE fortraces associated withlogical processor 1Event Name or MetricExpressionpage_walk_typeITLB_referenceTC_miscTC_deliver_modeEvent Mask ValueRequiredITMISSMISSFLUSHSS | SB | SIB-9

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