13.07.2015 Views

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual

SHOW MORE
SHOW LESS
  • No tags were found...

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

POWER OPTIMIZATION FOR MOBILE USAGESactiveIdleCore 1activeIdleCore 2Figure 10-5. Thread Migration in a Multicore ProcessorSoftware applications have a couple of choices to prevent this from happening:• Thread affinity management — A multi-threaded application can enumerateprocessor topology <strong>and</strong> assign processor affinity to application threads to preventthread migration. This can work around the issue of OS lacking multicore awareP-state coordination policy.• Upgrade to an OS with multicore aware P-state coordination policy —Some newer OS releases may include multicore aware P-state coordinationpolicy. The reader should consult with specific OS vendors.10.4.7.3 Multicore Considerations for C-StatesThere are two issues that impact C-states on multicore processors.Multicore-unaware C-state Coordination May Not Fully Realize Power SavingsWhen each core in a multicore processor meets the requirements necessary to entera different C-state type, multicore-unaware hardware coordination causes the physicalprocessor to enter the lowest possible C-state type (lower-numbered C state hasless power saving). For example, if Core 1 meets the requirement to be in ACPI C1<strong>and</strong> Core 2 meets requirement for ACPI C3, multicore-unaware OS coordinationtakes the physical processor to ACPI C1. See Figure 10-6.10-12

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!