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<strong>ITT</strong><br />

<strong>ITT</strong>5483, <strong>ITT</strong>7483<br />

4-BIT BINARY FULL ADDERS<br />

- -----<br />

SEMICONDUCTORS<br />

MSI 4-BIT BINARY FULL ADDERS<br />

HIGH-SPEED TTL 4-BIT FULL ADDERS<br />

FOR APPLICATION IN<br />

• Digital Computer Systems<br />

• Data-Handling Systems<br />

• Control Systems<br />

This full adder performs the addition <strong>of</strong> two 4-bit<br />

binary numbers. The sum (~\ outputs are provided<br />

for each bit and the resultant carry (C4 ) is obtained<br />

from the fourth bit. Designed for mediumto-high-speed.<br />

mUltiple-bit, parallel-add/serial-carry<br />

applications, the circuit utilizes high-speed, highfan-out<br />

transistor-transistor logic (TTL) but is compatible<br />

with both DTL and TTL families. The implementation<br />

<strong>of</strong> a single-inversion, high-speed,<br />

Darlington-connected serial-carry circuit within<br />

each bit minimizes the necessity for extensive<br />

"look-ahead" and carry-cascading circuits. The<br />

power dissipation level has been maintained considerably<br />

below that attainable with equivalent<br />

standard integrated circuits connected to perform<br />

four-bit full-adder functions.<br />

DUAL-IN-LiNE PACKAGE<br />

AND FLAT PACKAGE<br />

PIN CONFIGURATION<br />

(TOP VIEW>t<br />

, Pin assignments for these circuits are the same<br />

for all packages.'<br />

absolute maximum ratings over operating<br />

temperature range (unless otherwise noted)<br />

Supply Voltage V CC (See Note 1) ........................... 7V<br />

Input Voltage, Vin (See Notes 1 and 2) .............. 5.5V<br />

Operating Free-Air Temperature Range:<br />

<strong>ITT</strong>5483 Circuits .......................... -55°C to 125°C<br />

<strong>ITT</strong>7483 Circuits ................................... 0° C to 70° C<br />

Storage Temperature Range ......... -65°C to 150°C<br />

Notes:<br />

1. These voltage values are with respect to<br />

network ground terminal.<br />

2. Input signals must be zero or positive with<br />

respect to network ground terminal.<br />

logic<br />

Note: 3. Input conditions at A l' A 2. B l' B2, and Co<br />

are used to determine outputs ~1 and I:2'<br />

and the value <strong>of</strong> the internal carry C2. The<br />

values at C2. A3, B3. A4, and B4. are then<br />

used to determine outputs I:3. I:4. and C4 .<br />

A3<br />

I<br />

INPUT<br />

A<br />

"3<br />

IX<br />

A_<br />

o 0 0<br />

,<br />

0 0<br />

0<br />

, ,<br />

0<br />

0<br />

0 0 , 0 0<br />

, , ,<br />

0 0 0<br />

,<br />

0 0<br />

0<br />

, ,<br />

0<br />

0<br />

0 0 , 0 0<br />

, . , ,<br />

TRUTH TABLE<br />

OUTPUT<br />

% %<br />

co=o Co =1<br />

WHEN<br />

WHEN<br />

. Cz=O C2 =1<br />

-2 -2<br />

IX %<br />

c_<br />

f-IX IX IX ~-X<br />

::3 !:4 c_<br />

"-<br />

0 0 0 0 , 0 0<br />

0 , 0 0 0 , 0<br />

0<br />

, 0 0 0 , 0<br />

0 0 0 0<br />

0 0 0 , , 0<br />

0 0 0 0 0 , , 0 0 0 0 0 0 , 0 ,<br />

0 0 , , 0<br />

0 0 0 , ,. 0 0 0 0 0 0 0 0 , 0 0 0 , 0 0 , 0 , , , , ,<br />

3-116

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