ITT - Index of

ITT
ITT54H53, ITT54H54, ITT74H53, ITT74H54
EXPAN DABLE 2-2-2-3-INPUT AN D-OR-INVERT GATES
- -----
SEMICONDUCTORS
EXPANDABLE 2-2-2-3-INPUT
AND-OR-INVERT GATES
DUAL-IN-LINE PACKAGE
PIN CONFIGURATION
(TOP VIEW)
VCC
x} SEE-
X NOTE 4
SEE
f0
FLAT PACKAGE
PIN CONFIGURATION
(TOP VIEW)
@I
NOTE~ x0
@H
A0 @z
VCcG
,@GNO
B0
@G
GNO
C® 0 F
00 (DE
POSITIVE LOGIC: Z .(ABl+(COl+(EFGl+IHIl+tXl
IX-OUTPUT OF ITT54H60/1TT74H60 or ITT54H62/ITT74H621
POSITIVE LOGIC: Z'IAB1+tC01+lEFG1+lHIl+lXl
IX-OUTPUT OF ITT54H6D/ITT74H60 or ITT54H62/1TT74H621
schematic
,.--ov,c
INPUTS
LL---o~=:::::======j-...... -oGNO
Notes:
1. Component values shown are nominal.
2. Both expander inputs are used simultaneously
for expanding.
3. If expander is not used leave X and X pins
open.
4. Expander inputs X and X are functional on
the ITT54H53 and ITT74H53 circuits only.
Make no external connection to X and X pins
ofthe ITT54H54 and ITT74H74.
5. A total of four ITT54H60/lTT74H60 expander
gates may be connected to the ex- •
pander inputs.
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