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<strong>ITT</strong>5401, <strong>ITT</strong>7401<br />

QUADRUPLE 2-INPUT POSITIVE NAND GATES<br />

(WITH OPEN-COLLECTOR OUTPUT)<br />

ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range<br />

(unless otherwise noted)<br />

Parameter Min Typ' Max Unit . Test Conditions 2<br />

Vin(1) Logical 1 input voltage required 2 V<br />

at both input terminals to ensure<br />

logical 0 (on) level at output<br />

. Vin(O) Logical 0 input voltage required 0.8 V<br />

at input terminal to ensure<br />

logica I 1 (<strong>of</strong>f) level at output<br />

V1 Input Clamp Voltage -1.5 V Vee = Min Ii = -12 mA<br />

10ut(1) Output reverse current 250 uA Vee = MIN. Vin = O.BV.<br />

Vout(1) = 5.5V<br />

Vout(O) Logical 0 output voltage (on 0.4 V Vee = MIN. Vin = 2V.<br />

level)<br />

Isink = 16 mA<br />

lin(O) Logical 0 level input current -1.6 mA Vee = MAX. Vin = 0.4V<br />

(each input)<br />

lin(l) Logical 1 level input current 40 uA Vee = MAX. Vin = 2.4V<br />

(each input)<br />

1 mA Vee = MAX. Vin = 5.5V<br />

lee(O) Logical 0 level supply current 12 22 mA Vee = MAX. Vin = 5V<br />

lee(1) Logica I 1 level supply current 4 8 mA Vee = MAX. Vin = 0<br />

SWITCHING CHARACTERISTICS. Vee == 5V. TA = 25°e<br />

Parameter Min Typ Max Unit Test Conditions<br />

tpdO Propagation delay time to logical 8 15 ns eL = 15 pF. RL = 400 n<br />

o level<br />

tpdl Propagation delay time to logical 35 45 ns eL = 15 pF. RL = 4 kn<br />

1 level<br />

, All typical values are at Vee = 5V. TA =; 25°C.<br />

2 For conditions shown as M IN or MAX. use the appropriate value specified under recommended operating conditions<br />

for the applicable device type.<br />

3-18

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