ITT - Index of

ITT
ITT54H50. ITT54H51. ITT74H50. ITT74H51
DUAL 2-WIDE 2-IN PUT AND-DR-INVERT GATES
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SEMICONDUCTORS
DUAL 2-WIDE 2-INPUT
AND-OR-INVERT GATES
Package: Dual In-Line and Flat Pack
schematic (each gate)
DUAL-IN - LINE PACKAGE
PIN CONFIGURATION
(TOP VIEW)
...----_---._---_-0 Vee
2.8kn 760n 2.8 kn
58n
Notes:
(See Note 4l
1. Component values are nominal.
2. Both expander inputs are used
simultaneously for expanding.
3. If expander is not used. leave X and X pins
open.
4. Expander inputs X andXare functional on
the ITT54H50 and ITT75H50 circuits only.
Make no external connection to X and X pins
ofthe ITT54H51 and ITT74H51.
5. A total offour ITT54H60/ITT74H60
expander gates may be connected to the
expander inputs.
x0
xG)
lAG)
vccG
IB0
2A0
2B0
FLAT PACKAGE
PIN CONFIGURATION
(TOP VIEW)
,POSITIVE LOGIC:
l' (AB)+(CD)+ (X)
e
lD
@IC
®IZ
@GNO
@2Z
0 20
02C
(X,OUTPUT OF ITT 54H60/ITT74H60
recommended operating conditions
Min
Nom
Max
Unit
Supply Voltage Vee: 54H50, 54H51 .......................................................................................... 4.5 5
74H50, 74H51 .............................................................................,............ 4.75 5
Normalized Fan-Out From Each Output, N ....................................................................................
Operating Free-Air Temperature Range. T A: 54H50. 54H51 ................................................. -55 25
74H50. 74H51 ................................................. 0 25
5.5 V
5.25 V
10
125 °e
70 °e
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