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<strong>ITT</strong><br />

<strong>ITT</strong>9093, <strong>ITT</strong>9094, <strong>ITT</strong>9097, <strong>ITT</strong>9099<br />

-<br />

DUAL DTL MASTER-SLAVE J-K FLIP-FLOPS<br />

SEMICONDUCTORS -----------~<br />

Package: Dual In-L.ine and Flat Pack<br />

DUAL DTL MASTER-SLAVE J-K FLIP-FLOPS<br />

The ITISOS3 and <strong>ITT</strong>SOS4 are single chip dual<br />

flip-flops with circuitry similar to the ITIS45 and<br />

ITIS48 respectively. They feature internal J-K<br />

connections. separate clock pins. and separate SO<br />

pins. They are useful in ripple-carry counters and<br />

many other J-K flip-flop applications.<br />

The ITISOS7 and <strong>ITT</strong>SOSS are single chip dual<br />

flip-flops with circuitry similar to the ITIS48 and<br />

ITIS45 respectively. They feature internal J-K<br />

connections. a ·common clock pin. a common CD<br />

pin. and separate SO pins. They are useful in shift<br />

registers. shift counters. and synchronous counters.<br />

The <strong>ITT</strong>SOS3 and ITISOSS are usable with clock<br />

frequencies up to 5 MHz and feature a DC level<br />

sensitive clock input for stable operation regardless<br />

<strong>of</strong> clock waveshape.<br />

The <strong>ITT</strong>SOS4 and ITISOS7 are usable with clock<br />

frequencies up to 8 MHz.<br />

These circuits are fully compatible with the ITIS30<br />

series OTL family and the ITISOOO series TTL<br />

family.<br />

The ITISOSS series <strong>of</strong> flip-flops feature J-K<br />

feedback connections directly from the output<br />

stage <strong>of</strong> the device. This configuration increases the<br />

inherent noise immunity <strong>of</strong> the circuit. but prevents<br />

the circuit from being used in a wired - 0 R mode.<br />

Wired - OR capability is obtained with the<br />

ITISOSSX series <strong>of</strong> devices. which are functionally<br />

equivalent to the <strong>ITT</strong>SOSS series. but have J-K<br />

feedback connections from the buffer stage <strong>of</strong> the<br />

slave flip-flop.<br />

<strong>ITT</strong>SOS3/9094<br />

(DUAL <strong>ITT</strong>945/948 SEPARATE So: SEPARATE Cp)<br />

GND 7<br />

<strong>ITT</strong>9097/9099<br />

(DUAL <strong>ITT</strong>948/945 COMMON Cp : COMMON Co)<br />

ABSOLUTE MAXIMUM RATINGS 1<br />

Characteristics<br />

Units<br />

Pinout: Dual In-Line and Flat Pack<br />

Supply Voltage (VCC). -55°C to +125°C.<br />

Continuous ..................................... -0.5 to +8 Volts<br />

Supply Voltage (V CCI. Pulsed. < 1 sec ..... + 12 Volts<br />

Output Current. Into Outputs ........................... 30 mA<br />

Input Forward Current ................................... -10 mA<br />

Input Reverse Current .......................................... 1 mA<br />

Operating Temperature ................... -55to +125°C<br />

Storage Temperature ...................... -65 to + 125°C<br />

Input Voltage Applied to Input. -1.5 to +5.5 Volts<br />

Lead Temp. (soldering. 60 sec.) ................•..... 300°C<br />

NOTES:<br />

1. Above which useful life may be impaired.<br />

2. Allow 300·C/Watt OJ-A for 1/4" x 1/4"<br />

flatpack and dual in-line. Allow 50·C/Watt<br />

OJ-C for TO-5; 180·C/Watt OJ...,.c for 1/4"<br />

x 1/4" flatpack and dual in-line. Heat removal<br />

in 1/4" x 1/4" flatpack is highly dependent<br />

upon contact surfaces or air flow and on lead<br />

attachment and thermal paths thru leads, as<br />

well as number <strong>of</strong> soldered leads.<br />

4-37

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