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ITT - Index of

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_ I<br />

mm. ______________<br />

~~ MEMORY DRIVER WITH DECODE IT_T_7_5_3_24 INPUTS<br />

SEMICONDUCTORS<br />

MEMORY DRIVER<br />

DUAL-IN-L1NE PACKAGE (TOP VIEW)<br />

G~ramic<br />

WITH DECODE INPUTS<br />

PERFORMANCE<br />

• fast switching times<br />

• 400-mA output capability<br />

• internal decoding and timing circuitry<br />

• dual sink/source outputs<br />

• output short-circuit protection<br />

EASE OF DESIGN<br />

• TTL or DTL compatibility<br />

• eliminates transformer coupling<br />

• reduces drive-line lengths<br />

• increases reliability<br />

• minimizes external components<br />

• choice <strong>of</strong> flat or dual-in-Iine packages<br />

Description<br />

The <strong>ITT</strong>75324 is a monolithic memory driver<br />

with decode inputs designed for use with magnetic<br />

memories;',The device contains two 400-<br />

milliampere (source/sink) switch pairs, with<br />

decoding capability from four address lines.<br />

Two address inputs (8 and C) are used for<br />

mode selection, i.e., source <strong>of</strong> sink. The other<br />

two address inputs (A and D) are used for<br />

switch-pair selection, i.e., output switch-pair<br />

Y /Z or W/X respectively.<br />

The sink circuit is composed <strong>of</strong> an inverting<br />

switch with a transistor-transistor-Iogic (TTL)<br />

input. The source circuit is an emitter-follower<br />

driven from. a TTL input stage.<br />

The ITI75324 is characterized for operation<br />

from O·C to 70·C.<br />

AOORESS<br />

INPUT D<br />

OUTPUT<br />

13 y<br />

(SOURCE)<br />

SOURCE<br />

COLLEC­<br />

TORS<br />

OUTPUT<br />

II X<br />

(SOURCE)<br />

OUTPUT<br />

w<br />

(SINK)<br />

GND 1 and GND 2 are to be used in parallel<br />

NC-No internal connection<br />

DUAL-IN-LINE PACKAGE (TOP VIEW)<br />

Plastic'<br />

r A<br />

A~~~~~ B 2<br />

Lc<br />

r E 4<br />

TIMING<br />

INPUTS F<br />

LG<br />

ADDRESS<br />

INPUT D<br />

I<br />

CfTPUT<br />

(SINK)<br />

OUTPUT<br />

12 (SOURCE)<br />

SOURCE<br />

II COLLEC­<br />

TORS<br />

OUTPUT<br />

10 X<br />

(SOURCE)<br />

OUTPUT<br />

9 W<br />

(SINK)<br />

FLAT PACKAGE (TOP VIEW)<br />

rA0<br />

ADDRESS B @<br />

INPUTS<br />

Lc0<br />

rEG)<br />

T1MINGF0<br />

INPrG0<br />

ADDRESS(£)<br />

INPUT<br />

@OUTPUT<br />

14 Z<br />

(SINK)<br />

@VCC<br />

®OUTPUT<br />

12 y<br />

(SOURCE)<br />

@SOURCE<br />

II COLLEC-<br />

TORS<br />

® OUTPUT<br />

10 x<br />

(SOURCE I<br />

o OUTPUT.<br />

9 W<br />

(SINK)<br />

0 GND<br />

6-75

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