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GENERAL INFORMATION <strong>ITT</strong>54H/74H SERIES TTL FAMILY<br />

This series is designed to be used in conjunction<br />

with the 5417400 Series TTL in system locations<br />

requiring minimum propagation delays. They form<br />

a TTL family (Transistor-Transistor Logic) guaranteed<br />

to operate over the following ambient temperature<br />

ranges:<br />

54H Series<br />

74H Series<br />

-55°Cto 125°C<br />

O°C to 75°C<br />

All devices operate over a frequency range between<br />

D.C. and typically 30 and 50 MHz, and are fully<br />

compatible with all 54H174H series TIL and 930<br />

series DTL.<br />

Clamping diodes are provided at the inputs to<br />

enhance the inherent high noise immunity when<br />

driving transmission lines. Most outputs are <strong>of</strong><br />

totem pole configuration to give good drive capability,<br />

i.e.. high fan-out. especially into large<br />

capacitive loads. Other outputs include an opencircuit<br />

collector connection.<br />

All functions are available in plastic or ceramic and<br />

Flat Pack.<br />

FEATURES<br />

High speed-typical propagation delay (gate) <strong>of</strong><br />

6 ns. @ ~L = 25 pF<br />

Guaranteed noise margin-greater than 400<br />

mY.<br />

Low power dissipation-23 mW per gate at<br />

500"{' duty cycle.<br />

Worst case fan-out <strong>of</strong> 1 O.<br />

Low output impedance.<br />

Logic levels guaranteed over range <strong>of</strong> supply<br />

voltage and operating temperature<br />

Compatible with other DTL, TTL logic series.<br />

INDEX FOR STANDARD 7400H SERIES<br />

For the military range, replace 74H in the type<br />

number by 54H.<br />

Prefix the type number by <strong>ITT</strong> and end with J which<br />

indicates the ceramic dual-in-line package.<br />

For example: <strong>ITT</strong>5400 is a Quad 2-input NAND gate<br />

device in 54 series logic with a ceramic dual-in-line<br />

package.<br />

INTRODUCTION TO TTL<br />

The TTL circuit configurations are designed so that<br />

the uniform logic and noise margin levels apply to<br />

all the standard devices in the families. Thus many<br />

parameters and their limits are common. In addition<br />

the operating conditions are identified for each family.<br />

Once these standard operating conditions are<br />

understood it becomes possible for the designer to<br />

use the family by simply referring to the logic and<br />

connection diagrams on each data sheet. All common<br />

information is included in the remainder <strong>of</strong> this<br />

section.<br />

For ease <strong>of</strong> reading, the data only refers to the 74H<br />

series family but it is equally applicable to the 54H<br />

series. Where there are exceptions these are clearly<br />

indicated on the individual data sheets concerned.<br />

LOGIC DEFINITION<br />

I<br />

I<br />

~ Positive logic is used throughout the da,a sheets.<br />

This is defined as follows.<br />

I<br />

Logical '0' Low voltage; typically Oi2 V but<br />

2.0V !<br />

I<br />

Current flowing into a device terminal is defined as<br />

positive.<br />

I<br />

D.C. CHARACTERISTICS COMMON TO ALL<br />

DEVICES (except where otherwise stated)<br />

D.C. tests are carried out under the specified conditions.<br />

All inputs and outputs are tested for all possible<br />

logic states. Worst state load currents and<br />

voltages are applied and the test limits are applicable<br />

over the full temperature range. I<br />

Min. Max. Unit<br />

~,upp,ly voltage, V CC:<br />

I '74H series<br />

4.75 5.25 V<br />

\ I<br />

54H series<br />

4.5 5.5 V<br />

Operating temperature:<br />

74H series o 751°C<br />

54H series -'55 125°C<br />

D.C. noise margin typically greater than 1 V.<br />

,<br />

I<br />

I<br />

I<br />

3-14a

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