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_<br />

I mm<br />

<strong>ITT</strong>54182, <strong>ITT</strong>74182<br />

-L.L ____ _<br />

SEMICONDUCTORS<br />

LOOK-AHEAD CARRY GENERATOR<br />

MSI LOOK-AHEAD CARRY GENERATOR<br />

The <strong>ITT</strong>54182. ITI74182 is a high-speed. lookahead<br />

carry generator capable <strong>of</strong> anticipating a<br />

carry across four binary adders or group <strong>of</strong> adders.<br />

It is cascadable to perform full look-ahead across<br />

n-bit adders. with only 13 nanosecond delay for<br />

each level <strong>of</strong> look-ahead. Carry. generate-carry. and<br />

propagate-carry functions are provided as enumerated<br />

in the pin designation table above.<br />

DUAL-IN-LiNE PACKAGE<br />

AND FLAT PACKAGE<br />

PIN CONFIGURATION<br />

(TOP VIEW)t<br />

The <strong>ITT</strong>54182 or <strong>ITT</strong>74182. when used in conjunction<br />

with the <strong>ITT</strong>54181 or <strong>ITT</strong>74181 arithmetic<br />

logic unit (ALU) provides full high-speed carry lookahead<br />

capability for up to n-bit words. Each <strong>ITT</strong>-<br />

54182/1TT74182 generates the look-ahead (anticipated<br />

carry) across a group o'f four ALUs and. in<br />

addition. other carry look-ahead circuits may be<br />

employed to anticipate carry across sections <strong>of</strong> four<br />

look-ahead packages up to n-bits.<br />

Carry inputs and outputs <strong>of</strong> the <strong>ITT</strong>-<br />

54181/1TT74181 are, in their true form. and the<br />

carry propagate (P) and carry generate (G) are in<br />

negated form; therefore. the carry (input. outputs.<br />

generate. and propagate) functions <strong>of</strong> the lookahead<br />

circuit are implemented in the compatible<br />

forms. Reinterpretations <strong>of</strong> carry functions at the<br />

<strong>ITT</strong>54181/1TT74181 are also applicable and compatible<br />

with the look-ahead package. Logic equations<br />

are:<br />

Cn + x = GO + POCn<br />

Cn + y =G 1 +P1GO+P1POCn<br />

Cn + z = G2 + P2 G1 + P2 P1GO + P2 P1POCn<br />

G = G3 + P3 G2 + P3 P2 G 1+ P3 P2 P1 GO<br />

P = P3 P2 P1 Po<br />

Inputs <strong>of</strong> the <strong>ITT</strong>54182/1TT74182 are diodeclamped<br />

to minimize transmission-line effects. and<br />

Darlington outputs are employed to improve turn<strong>of</strong>f<br />

times and reduce propagation delay times. Typically.<br />

the average carry time is 13 nanoseconds.<br />

and power dissipation is typically 180 milliwatts or<br />

11 milliwatts per gate. The <strong>ITT</strong>54182 is characterized<br />

for operation over the full military temperature<br />

range <strong>of</strong> -55°C to 125°C; the <strong>ITT</strong>74182 is characterized<br />

for operation from 0° C to 70° C.<br />

LOGIC: SEE DESCRIPTION<br />

tplN ASSIGNMENTS FOR THESE CIRCUITS<br />

ALL PACKAGES.<br />

ARE THE SAME FOR<br />

absolute maximum ratings over operating freeair<br />

temperature range (unless otherwise noted)<br />

Supply voltage V CC (see Note 1) ................ ; ........... 7V<br />

Input voltage (see Note 1) .................................... 5.5V<br />

Interemitter voltage (see Note 2) ........................ 5.5V<br />

Operating free-air temperature range:<br />

<strong>ITT</strong>54182 ....................................... - 55°C to 125°C<br />

<strong>ITT</strong>74182 ................................................ O°Cto 70°C<br />

Storage temperature range ........... -65°C to 150°C<br />

Notes: 1. Voltage values are with respect to network<br />

ground terminal.<br />

2. This is the voltage between two emitters <strong>of</strong><br />

a multiple-emitter transistor. For this circuit.<br />

this rating applies to each G input in conjunction<br />

with any other G input or in conjunction<br />

with any P input.<br />

3- 221

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