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CIRCUIT TYPES <strong>ITT</strong>54H73, <strong>ITT</strong>74H73<br />

DUAL J-K MASTER-SLAVE FLIP-FLOPS<br />

SWITCHING CHARACTERISTICS. VCC = 5V. TA = 25°C. N = 10<br />

Parameter Min 'Typ Max Unit Test Conditions<br />

fclock Maximum clock frequency 25 30 MHz CL = 25pF. RL = 280 n<br />

tpd1 Propagation delay time to 6 13 ns CL = 25pF. RL = 280 n<br />

logical 1 level from clear to<br />

output<br />

tpdO Propagation delay time to 12 24 ns CL = 25pF. RL = 280 n<br />

logical 0 level from clear to<br />

output<br />

tpd1 Propagation delay time to 6 14 21 ns CL = 25pF. RL = 280 n<br />

logical 1 level from clock to<br />

output<br />

tpdO<br />

Propagation delay time to<br />

logical 0 level from clock to<br />

output<br />

10 22 27 ns CL = 25pF. RL = 280 n<br />

schematic (each flip·flop)<br />

1---.,....-...... ----...... ..:....--

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