ITT - Index of

Series ITT9000-1, ITT9000-5
HIGH SPEED TTL
NOTE 2
Because of the input clamp diodes, excess current can be
drawn out of the inputs if the D.C. input voltage Is more
negative than -0.5 V. The diode is designed to clamp off
large negative A.C. swings associated with fast fall times
and long lines. This maximum rating is intended only to limit
the steady state input voltage and current.
LOADING RULES
In this data sheet the following notation has
been chosen to indicate the input loading and
output drive for all logic elements.
A/B
INPUTS
LOG Ie ELEMENT
OUTPUTS
Where A= high logic level input load factor
B = low logic level input load factor
X= high logic level output drive factor
Y = low logic level output drive factor
When checking for loading violations it is only
necessary to insure that the sum of the high
logic level input load factors at any node does
not exceed the high logic level output drive
factor at that node. The same is true for the low
level load and drive factors. These rules apply
only within the TTL ITT9000 series.
Multiplying the factor with the appropriate
current per unit load gives the input loading or
output drive in terms of current. For the TTL
circuits of this data sheet, current per unit is
-1.6 mA maximum at the low logic level and is
60uA maximum at the high logic level.
In the case where unused inputs of an AND
gate are shorted to a driven input, the high
logic level input load factor for the inputs will
be the number of inputs shorted together times
the high logic input load factor for one input.
The low logic level input load factor for the
inputs will be the same as that for a single
input.
UNUSED INPUTS
Proper termination of unused inputs will result
in maximum operating speed. Substantial
degradation of turn-on delay may occur if
unused inputs are left open.
The following are acceptable ways to terminate
unused inputs:
1. Tie the input to a used input on the same
gate. The TTL 9000 series has made special
provision for this method by offering extra
high level drive factor on all inputs.
X/V
2. Tie the input to Vcc through a resistor.
This resistor should be chosen to keep the
input current within absolute maximum ratings
for any possible extrenr ' of the Vcc
supply. More than one input may be terminated
through one resistor.
3. Tie inputs to a separate supply between 4.5
and 2.4 V, if one should be available.
4. 'Tie he inputs to the output of an unused
gate. The unused gate must provide a
constant high level output.
NAND GATES-9002, 9003, 9004 AND 9007
HEX INVERTER-9016
The 9002, 9003, 9004 and 9007 are active low
level output AND gates commonly known as
NAND gates. The 9016 is a hex inverter with
input and output characteristics identical to the
9002, 9003, 9004 and 9007. The variety of gate
combinations provides the system designer the
utmost in logic flexibility and reduces package
count.
Figure 1 -
LOGIC SYMBOL AND PIN
CONFIGURATIONS
9016 9002
9
"
10
10
12
13 12 13
9003 9004
1
2 12
13
3
4
5
9 10
10 12
11 13
4
10
11
12
VCC=PIN 14, GND=PIN 7 13
9007
"
3-287