ITT - Index of

ITT9300
MSI 4-Bit Shift Register
SELECTOR SWITCH SHOWN IN N=IS POSITION
INPUT -------4
Po PI P2 P3
9300 SR
Qo QI Q2 Q3 Q3
MASTER _________ ~
RESET
10-+---- OUTPUT
fin + N
Figure 9 -
DIVIDE BY N COUNTER FOR
N = 2 to 15
This counter produces an output pulse for every
tl
LSD
~ SELECTOR
SWITCH
2 3 4 5 6 7 8 9
hi>~"
INPUT
~
ift>o-
COUNT SEQUENCE
9 o 0 1 1
8 o 0 0 1
7 o 0 0 0
6 1 000
5 1 1 0 0
4 o 1 1 0
1 0 1 1
I I 0 I
I I I 0
0 o 1 1 I
t
), I
J PE Po Pl P2 P3
9300 SR
Q3 Q3
I-< K MR Qo Ql Q2
'I'
I
~ L:
p-
N input pulses, where the number N is
determined by the setting of the slide selector
switch as shown or by logic inputs to the
parallel data lines from an external source.
M5D
-::f"] SELECTOR
SWITCH
1 2 3 4 5 6 7 8 9
IP-~:';"
to
9007
),
J PE Po Pl P2 P3
9300 SR
Qo Ql Q2 Q3 Q3
Figure 10 - TWO DECADE
PROGRAMMABLE DIVIDER
~
This circuit divides by any number "N" from 1
to 1 00. The selected N is one greater than is
shown on the slide switches. As an example
the switched are showing 56, therefore the
circuit will divide by 57 with this setting.
'\
OUT PUT
fin' TN
3-316