ITT - Index of

ITT74124
UNIVERSAL PULSE GENERATOR
ElECTRICAL CHARACTERISTICS AND
RECOMMENDED OPERATING CONDITIONS
Propagation delay, trigger input to 0, ............. .43 ns
Inhibit Oscillator input to 0, ............................ 26 ns
0, to 02 ...................... : ....................................... 15 ns
Power dissipation (50% duty cycle) ............. 1 50 mW
Input loading factor ................................... 1 Unit load
Maximum fan out.. .................................. 10 unit loads
External timing resistor, RT ....................... 1.4 kDmin
(54124 25K max.) 50 kDmax.
External timing capacitor, GT ....................... 0 pF min.
50 uF max.
Recommended maximum
output frequency ........................................... 10M Hz
Recommended input pulse width:
Inhibit Oscillator input ............................ , .... 15 ns min.
Trigger input ................................................. 50 ns min.
Trigger input setup time ....................................... 10 ns
Maximum mark space ratio:
RT = Max. Value ............................................. 100: 1
RT = Min. Value ................................................... 5: 1
Output pulse width ................................... 0.695 GTRT
Timing Stability:
Typical Timing period change
with supply voltage .............................. 0.2% per Volt
Typical Timing period change
over 0° to 75°G Temperature range ............ 0.15%
The ITT 74124 Universal Pulse Generator has
been designed specifically for clock and delayed
pulse generation applications. This versatile device
incorporates two cascaded monostable circuits to
provide the delayed pulse facility and a gated feedback
path allows its operation as a controllable high
stability oscillator. The external timing components
which control the delay and pulse width periods in
the delayed pulse generator mode are used to determine
the oscillator mark - space ratios (duty cycle).
The true output. 0, from the first monostable
and true and complements outputs, 02 and 02
from the second monostable are provided. These
outputs are of standard totem pole configuration
and provide a maximu m fan-out of 10 T.T.l. loads.
Delayed Pulse Generator Mode
When operating in the delayed pulse mode the
feedback loop is inhibited by maintaining the inhibit
oscillator input at '0'. The device can then be triggered
from the positive edge trigger input with the
negative edge input held at '0', or from the negative
edge trigger input with the positive edge trigger input
held at '1'. The positive trigger input incorporates
a Schmitt trigger circuit for slow edges or level
detection. Once triggered further transistions on
the inputs have no effect on the 01 output pulse
until after the first monostable timing period is
completed. The second. monostable is triggered
from the first monostable output pulse by. its trailing
edge and is not effected by any further transistions
from the first monostable until its timing period is
over. The output of the second monostable is therefore
a single pulse having .a width determined by
the time-constant of the second monostable and
which is delayed from the initiating input trigger
edge by the time constant of the first monostable.
Oscillator (Astable Multivibrator) Mode
The feedback path is operative when the inhibit oscillator
input is taken to logical ',', and for operation
in the oscillator mode the positive trigger input
and/or the negative trigger input must be maintained
at '1'. The feedback path enables the trailing
edge from the second monostable to retrigger the
first monostable to maintain the oscillations. As
soo.n as the inhibit oscillator input is taken to logical
'0', the device reverts to its delayed pulse mode and
the oscillations stop when the second monostable
timing period is over. In this way only whole cycles
are produced. It is a feature of the design that a
locked-up state, preventing the circuit from oscillating,
cannot occur. The first monostable is immediately
triggered on application of '1' to the inhibit
oscillator input with the correct trigger input
levels, and will not lock-up when the supplies are
switched on with the correct input signals applied.
By virtue of the inhibit oscilliltorinput it is possible
to gate the oscillator on and off to produce bursts
of pulses. It is also possible to synchronize the oscillator
by applying appropriate waveforms at the
inputs. This facility allows for its use as a pulse frequency
divider.
The time period for the first monostable, which determines
the pulse width from the 01 output and
the delay before the pulse from the 02 and 02 outputs
begins, is set by the timing circuit on pins 1,
2, and 3. The time period for the second
monostable determines the pulse width obtained
from the 02 and 02 outputs is set by the timing
components connected to pins 11, 12, and 13. The
timing components may be connected as follows:
3 -159