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<strong>ITT</strong>75324<br />

MEMORY DRIVER WITH DECODE INPUTS<br />

Inputs<br />

TRUTH TABLE<br />

Outputs<br />

Address Timing Sink Sources Sink<br />

A B C D E F G W X Y Z<br />

0 0 1 1 1 1 1 On Off Off Off<br />

0 1 0 1 1 1 1 Off On Off Off<br />

1 1 0 0 1 1 1 Off Off On Off<br />

1 0 1 0 1 1 1 Off Off Off On<br />

x x x x 0 x x Off Off Off Off<br />

x x x x x 0 x Off Off Off Off<br />

x x x x x x 0 Off Off Off Off<br />

NOTES:<br />

1. X = Logical 1 or logical O.<br />

2. Not more than one output is to be allowed to<br />

be ON at one time: When all timing inputs are<br />

at a logical 1, two <strong>of</strong> the address inputs must<br />

be at logical O.<br />

Standard positive logic applies with the following<br />

definitions used for specifying digital-level<br />

signals:<br />

LOW VOLTAGE = LOGICAL 0<br />

HIGH VOLTAGE = LOGICAL 1<br />

Absolute Maximum Ratings Over Operating<br />

Case Temperature Range (unless otherwise<br />

noted)<br />

Supply voltage Vee (See Note 1) ........ 17V<br />

Input voltage (See Note 2) .............. 5.5V<br />

Operating case temperature range O'C to 70·C<br />

Continuous total power dissipation<br />

at (or below) 70'C case<br />

temperature ..................... 800mV<br />

Storage temperature range .. -65'C to 150'C<br />

NOTES:<br />

1. Voltage values are with respect to network<br />

ground terminal.<br />

2. Input signals must be zero or positive with<br />

respect to network ground terminal.<br />

ELECTRICAL CHARACTERISTICS (unless otherwise noted, Vee = 14V, Tc = O'C to 70'C)<br />

Parameter Min Typ* Max Unit Test Conditions<br />

VlnW Input voltage required to 3.5 V<br />

ensure logical 1 at any input<br />

Vln(O) Input voltage required to 0.8 V<br />

ensure logical 0 at any input<br />

hn(1) Logical 1 level address input 200 p..A Vln - 5V<br />

current<br />

hnw Logical 1 level timing input 100 p..A Vln - 5V<br />

current<br />

hnCo) Logical 0 level address input -6 mA Vln - OV<br />

current<br />

hn(o) Logical 0 level timing input -12 mA Vln - OV<br />

current<br />

Vc •• t ) Sink saturation voltage 0.75 0.85 V 1.lnk = 420 mA, RL - 53n<br />

Vc •• t) Source saturation voltage 0.75 0.85 V I •• urce = -420 mA,<br />

R,. =47.5n<br />

I.ff . Output reverse current 125 200 p.A Vln - OV<br />

(<strong>of</strong>f state)<br />

lee Supply current, all sources and 12.5 15 mA Vln - OV<br />

sinks <strong>of</strong>f<br />

lee Supply current, either sink 30 40 mA<br />

selected<br />

Icc Supply current, either source 25 35 mA<br />

selected<br />

"These typical values are at Tc = 25'C.<br />

6-76

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