ITT - Index of

APPLICATION DATA FOR OPEN COLLECTOR DEVICES
Logical 0 (on levell Circuit Calculations (see
figure BI
The current through the resistor must be limited to
the maximum sink-current capability of one output
transistor. Note that if several output transistors are
wire-OR connected. the current through RL may be
shared by those paralleled transistors. However. unless
it can be absolutely guaranteed that more than
one transistor will be on during logical 0 periods.
the current must be limited to 16mA. the maximum
current which will ensure a logical 0 maximum of
0.4 volts.
Also. fan-out must be considered. Part of the 16mA
will be supplied from the inputs which are being
driven. This reduces the amount of current which
can be allowed through RL.
Therefore. the equation used to determine the minimum
value of RL would be:
Vee -
ISINK capability -
Vout(O) required
ISINK from TTL loads
TTL LOADS
C.I,ul.lion,
___ ~Yc~c~-__ Y;~~t~lo~l_req~u_ire_d __ __
RL(minl = I'i,* 'op.bilily - I'i,* from TTL lo.ds
S - 0.4 4.6
R - = -- = 4100
Llminl - 0.016 _ 0.0048 0.0112
I
.1
~
N=3
N • lin(O) = 3 • 1.6 rnA
MAXIMUM I sink CAPABILITY
OF ONE ON OUTPUT = 16 mA
t Current into OFF outputs i. negligible at logical O.
Calculation:
Vee - V~ut(O) required
RL(min) = ISINK capability - ISINK from TTL loads
RL(min)
5 - 0.4
0.016 - 0.0048
4.6
0.0112
= 41000
FIGURE B -
LOGICAL 0 CIRCUIT CONDITIONS
3-13