SIMPLORER User Manual V6.0 - FER-a

SIMPLORER 6.0 — Manual 153
specified on the LTRA model, at least when C is not zero. Please note that the preferred method
in SPICE is to set initial node voltages, rather than device voltages. This method also works
in SIMPLORER.
Convergence Tolerances
The library code adjusts the standard SPICE convergence options, based on the SIMPLORER
simulation parameters. When running under SIMPLORER, SPICE-compatible models do not
use these parameters for convergence testing, but they may use the parameters to reject a
time step due to estimated local truncation error in the numerical integrations. The main
SPICE parameter controlling this is RELTOL, which is directly comparable to the SIMPLORER
LDF parameter.
SPICE Convergence Parameters
This summarizes SPICE 3f5 convergence parameters, specified on a .OPTIONS card.
• RELTOL – the relative error to be allowed in device voltage or current. Defaults to 0.1%,
but users are often advised to make RELTOL=1%, either for faster simulations, or to
achieve convergence in power electronic circuits. The SIMPLORER default for LDF is 1%.
• ABSTOL and VNTOL – minimum absolute error tolerances, sometimes called best accuracy,
for current and voltage, respectively. These come into play when the voltages and
currents approach zero, and RELTOL would produce a very low magnitude. Default values
for SPICE are ABSTOL=1e-12 and VNTOL=1e-6. These must often be increased for
power electronics, and users are advised to set values 8 or 9 orders of magnitude below
the peak current or voltage expected. The SIMPLORER defaults for similar parameters
VEmax and IEmax are both 1e-3, but these parameters do not mean the same as ABS-
TOL and VNTOL.
• CHGTOL – the best accuracy for charge on junction capacitances, independent of ABS-
TOL and VNTOL. Default value is 1e-14, often increased for power electronics.
• TRTOL – in SPICE, the local truncation error function estimates a time step, which is
then multiplied by TRTOL for comparison to the present time step. Default value is 7, and
it seems like a pure fudge factor. In Georgia Tech XSPICE, the default was changed to '1'.
Users are sometimes advised to increase TRTOL, up to 40, for faster simulations by allowing
larger time steps. There is no apparent counterpart in SIMPLORER.
• GMIN – the minimum conductance allowed in SPICE. Devices will not add matrix elements
of lower magnitude than GMIN to the Jacobian. Defaults to 1e-12. There is no
apparent counterpart in SIMPLORER.
• Various Iteration Limits – SIMPLORER takes care of the iteration limits for the SPICE
models, so the SPICE iteration limits are not discussed here.
To assist convergence, SPICE users are often advised to loosen the tolerances, especially REL-
TOL. Increasing the iteration limits is also suggested.
Users are not often advised to tighten up the SPICE tolerances. An exception is with the voltage-controlled
and current-controlled switches, where CHGTOL=1e-16 and TRTOL=1 has
been suggested. The values should not be changed for this reason in SIMPLORER, because it
does not use the SPICE switch models.
Besides their use for error estimates, nearly all of the SPICE device models refer to some of the
convergence parameters internally when loading the Jacobian and the right-hand side.
Sometimes this is used to bypass some calculations, and other times to adjust the matrix elements.