Xilinx Virtex-6 Libraries Guide for HDL Designs

Chapter 4: About Design ElementsIntroductionThis design element represents the Virtex®-6 FPGA GTH transceiver. GTH is the highest performance,10G-optimized configurable transceiver in the Virtex-6 FPGA as part of the HXT family. Refer to Virtex-6 FPGAGTH Transceivers User Guide for detailed information regarding this component. The Virtex-6 FPGA GTHTransceivers Wizard is the preferred tool to generate a wrapper to instantiate a GTHE1_QUAD primitive. TheWizard can be found in the Xilinx® CORE Generator tool.Design Entry MethodTo instantiate this component, use the Virtex-6 FPGA GTH Transceivers Wizard or an associated core containingthe component. Xilinx does not recommend direct instantiation of this component.For More Information• See the Virtex-6 FPGA GTH Transceivers User Guide.• See the Virtex-6 FPGA User Documentation (User Guides and Data Sheets).Virtex-6 Libraries Guide for HDL DesignsUG623 (v 11.4) December 2, 2009 www.xilinx.com 149