Xilinx Virtex-6 Libraries Guide for HDL Designs

Chapter 3Functional CategoriesThis section categorizes, by function, the circuit design elements described in detail later in this guide. Theelements ( primitives and macros) are listed in alphanumeric order under each functional category.Advanced Convenience Primitives RAM/ROMArithmetic Functions Gigabit I/O Registers/LatchesClock Components I/O Components Shift Register LUTConfig/BSCAN Components Logic Slice/CLB PrimitivesAdvancedDesign ElementPCIE_2_0SYSMONTEMAC_SINGLEDescriptionPrimitive: PCI Express version 2.0 Compliant.Primitive: System MonitorPrimitive: Tri-mode Ethernet Media Access Controller (MAC)Arithmetic FunctionsDesign ElementDSP48E1DescriptionPrimitive: 25x18 Two’s Complement Multiplier with Integrated 48-Bit, 3-InputAdder/Subtracter/Accumulator or 2-Input Logic UnitVirtex-6 Libraries Guide for HDL DesignsUG623 (v 11.4) December 2, 2009 www.xilinx.com 75