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Xilinx Virtex-6 Libraries Guide for HDL Designs

Xilinx Virtex-6 Libraries Guide for HDL Designs

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Chapter 4: About Design ElementsGTXE1Primitive: Gigabit TransceiverIntroductionThis design element represents the <strong>Virtex</strong>®-6 FPGA RocketIO GTX transceiver, a power-efficient and highlyconfigurable transceiver. Refer to <strong>Virtex</strong>-6 FPGA RocketIO GTX Transceiver User <strong>Guide</strong> <strong>for</strong> detailed in<strong>for</strong>mationregarding this component. The <strong>Virtex</strong>-6 FPGA RocketIO GTX Transceiver Wizard is the preferred tool to generatea wrapper to instantiate a GTXE1 primitive. The Wizard can be found in the <strong>Xilinx</strong>® CORE Generator tool.<strong>Virtex</strong>-6 <strong>Libraries</strong> <strong>Guide</strong> <strong>for</strong> <strong>HDL</strong> <strong>Designs</strong>150 www.xilinx.com UG623 (v 11.4) December 2, 2009

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