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Xilinx Virtex-6 Libraries Guide for HDL Designs

Xilinx Virtex-6 Libraries Guide for HDL Designs

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Chapter 4: About Design ElementsMUXF8_LPrimitive: 2-to-1 Look-Up Table Multiplexer with Local OutputIntroductionThis design element provides a multiplexer function in eight slices <strong>for</strong> creating a function-of-8 look-up table or a32-to-1 multiplexer in combination with the associated four look-up tables and two MUXF8s. Local outputs(LO) of MUXF7 are connected to the I0 and I1 inputs of the MUXF8. The S input is driven from any internalnet. When Low, S selects I0. When High, S selects I1.The LO output connects to other inputs in the same CLB slice.Logic TableInputsOutputS I0 I1 LO0 I0 X I01 X I1 I1X 0 0 0X 1 1 1Port DescriptionsPort Direction Width FunctionLO Output 1 Output of MUX to local routingI0 Input 1 Input (tie to MUXF7 LO out)I1 Input 1 Input (tie to MUXF7 LO out)S Input 1 Input select to MUXDesign Entry MethodInstantiationInferenceCORE Generator and wizardsMacro supportYesRecommendedNoNo<strong>Virtex</strong>-6 <strong>Libraries</strong> <strong>Guide</strong> <strong>for</strong> <strong>HDL</strong> <strong>Designs</strong>UG623 (v 11.4) December 2, 2009 www.xilinx.com 239

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