Xilinx Virtex-6 Libraries Guide for HDL Designs

Chapter 4: About Design ElementsDesign Entry MethodTo instantiate this component, use the Virtex-6 FPGA RocketIO GTX Transceiver Wizard or an associated corecontaining the component. Xilinx does not recommend direct instantiation of this component.For More Information• See the Virtex-6 FPGA RocketIO GTX Transceivers User Guide.• See the Virtex-6 FPGA User Documentation (User Guides and Data Sheets).Virtex-6 Libraries Guide for HDL DesignsUG623 (v 11.4) December 2, 2009 www.xilinx.com 151