MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Non-Volatile Memory FLASH (CMFR)
Functional Description
9.8 Functional Description
The CMFR is an electrically erasable and programmable non-volatile
memory. This subsection describes the functioning of the CMFR during
various operational modes.
9.8.1 Master Reset
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9.8.2 Register Read and Write Operation
9.8.3 Array Read Operation
The device signals a master reset to the CMFR when a full reset is
required. A master reset is the highest priority operation for the CMFR
and terminates all other operations. The CMFR uses master reset to
initialize all register bits to their default reset value. If the CMFR is in
program or erase operation (EHV = 1) and a master reset is generated,
the module performs the needed interlocks to disable the high voltage
without damage to the high voltage circuits. Master reset terminates any
other mode of operation and forces the CMFR BIU to a state ready to
receive accesses.
The CMFR control registers are accessible for read or write operation at
all times while the device is powered up except during master reset.
The access time of a CMFR register is one system clock for both read
and write accesses. Accesses to unimplemented registers causes the
BIU to generate a data error exception.
The CMFR array is available for read operation under most conditions
while the device is powered up. Reads of the array are ignored (no
response) during master reset or while the CMFR is disabled or in stop
mode. During programming and erase operation while the high voltage
is applied to the array (EHV = 1 or HVS = 1) the BIU generates data
errors for all array accesses. At certain points, as defined in the program
or erase sequence, reading the array results in a margin read. These
margin reads return the status of the program or erase operation and not
the data in the array.
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Non-Volatile Memory FLASH (CMFR) 205
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