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MMC2107 - Freescale Semiconductor

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<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

Queued Analog-to-Digital Converter (QADC)<br />

Register Descriptions<br />

PF2 is maintained by the QADC regardless of whether the<br />

corresponding interrupts are enabled. The software may poll PF2 to<br />

find out when the QADC has reached a pause in scanning a queue.<br />

The software acknowledges that it has detected a pause flag being<br />

set by writing a 0 to PF2 after the bit was last read as a 1.<br />

1 = queue 2 has reached a pause.<br />

0 = queue 2 has not reached a pause.<br />

See Table 18-7 for a summary of pause response in all scan modes.<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

TOR1 — Queue 1 Trigger Overrun<br />

TOR1 indicates that an unexpected trigger event has occurred for<br />

queue 1. TOR1 can be set only while queue 1 is in the active state.<br />

A trigger event generated by a transition on the external trigger pin or<br />

by the periodic/interval timer may be captured as a trigger overrun.<br />

TOR1 cannot occur when the software-initiated single-scan mode or<br />

the software-initiated continuous-scan mode are selected.<br />

TOR1 occurs when a trigger event is received while a queue is<br />

executing and before the scan has completed or paused. TOR1 has<br />

no effect on the queue execution.<br />

After a trigger event has occurred for queue 1, and before the scan<br />

has completed or paused, additional queue 1 trigger events are not<br />

retained. Such trigger events are considered unexpected, and the<br />

QADC sets the TOR1 error status bit. An unexpected trigger event<br />

may be a system overrun situation, indicating a system loading<br />

mismatch.<br />

In external gated continuous-scan mode, the definition of TOR1 has<br />

been redefined. In the case when queue 1 reaches an end-of-queue<br />

condition for the second time during an open gate, TOR1 becomes<br />

set. This is considered an overrun condition. In this case CF1 has<br />

been set for the first end-of-queue 1 condition and then TOR1<br />

becomes set for the second end-of-queue 1 condition. For TOR1<br />

to be set, software must not clear CF1 before the second<br />

end-of-queue 1.<br />

<strong>MMC2107</strong> – Rev. 2.0<br />

Technical Data<br />

MOTOROLA Queued Analog-to-Digital Converter (QADC) 431<br />

For More Information On This Product,<br />

Go to: www.freescale.com

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