MMC2107 - Freescale Semiconductor

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Freescale Semiconductor, Inc. Serial Communications Interface Modules (SCI1 and SCI2) The SCI sets the TDRE flag every time it transfers data from SCIDRH and SCIDRL to the transmit shift register. TDRE indicates that SCIDRH and SCIDRL can accept new data. If the TIE bit is set, TDRE generates an interrupt request. NOTE: SCIDRH and SCIDRL transfer data to the transmit shift register and sets TDRE 9/16ths of a bit time after the previous frame’s stop bit starts to shift out. nc... Freescale Semiconductor, I Hardware supports odd or even parity. When parity is enabled, the most significant data bit is the parity bit. When the transmit shift register is not transmitting a frame, the TXD pin goes to the idle condition, logic 1. Clearing the TE bit while the transmitter is idle will return control of the TXD pin to the SCI data direction (SCIDDR) and SCI port (SCIPORT) registers. If the TE bit is cleared while a transmission is in progress (while TC = 0), the frame in the transmit shift register continues to shift out. Then the TXD pin reverts to being a general-purpose I/O pin even if there is data pending in the SCI data register. To avoid accidentally cutting off a message, always wait until TDRE is set after the last frame before clearing TE. To separate messages with preambles with minimum idle line time, use this sequence between messages: 1. Write the last byte of the first message to SCIDRH and SCIDRL. 2. Wait until the TDRE flag is set, indicating the transfer of the last frame to the transmit shift register. 3. Queue a preamble by clearing and then setting the TE bit. 4. Write the first byte of the second message to SCIDRH and SCIDRL. When the SCI relinquishes the TXD pin, the SCIPORT and SCIDDR registers control the TXD pin. To force TXD high when turning off the transmitter, set bit 1 of the SCI port register (SCIPORT) and bit 1 of the SCI data direction register (SCIDDR). The TXD pin goes high as soon as the SCI relinquishes control of it. Technical Data MMC2107 – Rev. 2.0 354 Serial Communications Interface Modules (SCI1 and SCI2) MOTOROLA For More Information On This Product, Go to: www.freescale.com
Freescale Semiconductor, Inc. Serial Communications Interface Modules (SCI1 and SCI2) Transmitter 16.11.3 Break Frames Setting the SBK bit in SCICR2 loads the transmit shift register with a break frame. A break frame contains all logic 0s and has no start, stop, or parity bit. Break frame length depends on the M bit in the SCICR1 register. As long as SBK is set, the SCI continuously loads break frames into the transmit shift register. After SBK is clear, the transmit shift register finishes transmitting the last break frame and then transmits at least one logic 1. The automatic logic 1 at the end of a break frame guarantees the recognition of the next start bit. nc... Freescale Semiconductor, I 16.11.4 Idle Frames NOTE: The SCI recognizes a break frame when a start bit is followed by eight or nine 0 data bits and a 0 where the stop bit should be. Receiving a break frame has these effects on SCI registers: • Sets the FE flag • Sets the RDRF flag • Clears the SCIDRH and SCIDRL • May set the OR flag, NF flag, PE flag, or the RAF flag An idle frame contains all logic 1s and has no start, stop, or parity bit. Idle frame length depends on the M bit in the SCICR1 register. The preamble is a synchronizing idle frame that begins the first transmission after writing the TE bit from 0 to 1. If the TE bit is cleared during a transmission, the TXD pin becomes idle after completion of the transmission in progress. Clearing and then setting the TE bit during a transmission queues an idle frame to be sent after the frame currently being transmitted. When queueing an idle frame, return the TE bit to logic 1 before the stop bit of the current frame shifts out to the TXD pin. Setting TE after the stop bit appears on TXD causes data previously written to SCIDRH and SCIDRL to be lost toggle TE for a queued idle frame while the TDRE flag is set and immediately before writing new data to SCIDRH and SCIDRL. MMC2107 – Rev. 2.0 Technical Data MOTOROLA Serial Communications Interface Modules (SCI1 and SCI2) 355 For More Information On This Product, Go to: www.freescale.com
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MMC2107 - Freescale Semiconductor

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