MMC2107 - Freescale Semiconductor

External Bus Interface Module (EBI)
Freescale Semiconductor, Inc.
19.6 Enable Byte Pins (EB[3:0])
The enable byte pins (EB[3:0]) are configurable as byte enables for read
and write cycles, or as write enables for write cycles only. The default
function is byte enable unless there is an active chip-select match with
the WE bit set. In all external cycles when one or more EB pins are
asserted, the encoding corresponds to the external data pins to be used
for the transfer as outlined in Table 19-3.
Table 19-3. EB[3:0] Assertion Encoding
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Freescale Semiconductor, I
19.7 Bus Master Cycles
EB Pin
EB0
EB1
EB2
EB3
External Data Pins
D[31:24]
D[23:16]
D[15:8]
D[7:0]
In this subsection, each EBI bus cycle type is defined in terms of actions
associated with a succession of internal states. These internal states are
only for reference and may not correspond to any implemented machine
states.
Read or write operations may require multiple bus cycles to complete
based on the operand size and target port size. Refer to 19.5 Operand
Transfer for more information. In the discussion that follows, it is
assumed that only a single bus cycle is required for a transfer.
In the waveform diagrams (Figure 19-3 through Figure 19-6), data
transfers are related to clock cycles, independent of the clock frequency.
The external bus states are also noted.
Technical Data MMC2107 – Rev. 2.0
510 External Bus Interface Module (EBI) MOTOROLA
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