MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Programmable Interrupt Timer Modules (PIT1 and PIT2)
14.7 Functional Description
This subsection describes the PIT functional operation.
14.7.1 Set-and-Forget Timer Operation
This mode of operation is selected when the RLD bit in the PCSR
register is set.
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Freescale Semiconductor, I
PIT CLOCK
COUNTER
MODULUS
PIF
When the PIT counter reaches a count of 0x0000, the PIF flag is set in
PCSR. The value in the modulus latch is loaded into the counter, and the
counter begins decrementing toward 0x0000. If the PIE bit is set in
PCSR, the PIF flag issues an interrupt request to the CPU.
When the OVW bit is set in PCSR, the counter can be directly initialized
by writing to PMR without having to wait for the count to reach 0x0000.
0x0002 0x0001 0x0000 0x0005
0x0005
Figure 14-5. Counter Reloading from the Modulus Latch
Technical Data MMC2107 – Rev. 2.0
290 Programmable Interrupt Timer Modules (PIT1 and PIT2) MOTOROLA
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