MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Serial Communications Interface Modules (SCI1 and SCI2)
Memory Map and Registers
Table 16-2. Serial Communications Interface Module Memory Map (1)
SCI1
Address
SCI2
Bits 7–0 Access (2)
0x00cc_0000 0x00cd_0000 SCI baud register high (SCIBDH) S/U
0x00cc_0001 0x00cd_0001 SCI baud register low (SCIBDL) S/U
0x00cc_0002 0x00cd_0002 SCI control register1 (SCICR1) S/U
0x00cc_0003 0x00cd_0003 SCI control register 2 (SCICR2) S/U
nc...
Freescale Semiconductor, I
0x00cc_0004 0x00cd_0004 SCI status register 1 (SCISR1) S/U
0x00cc_0005 0x00cd_0005 SCI status register 2 (SCISR2) S/U
0x00cc_0006 0x00cd_0006 SCI data register high (SCIDRH) S/U
0x00cc_0007 0x00cd_0007 SCI data register low (SCIDRL) S/U
0x00cc_0008 0x00cd_0008 SCI pullup and reduced drive register (SCIPURD) S/U
0x00cc_0009 0x00cd_0009 SCI port data register (SCIPORT) S/U
0x00cc_000a 0x00cd_000a SCI data direction register (SCIDDR) S/U
0x00cc_000b
to
0x00cc_000f
0x00cd_000b
to
0x00cd_000f
Reserved (3)
1. Each module is assigned 64 Kbytes of address space, all of which may not be decoded. Accesses outside of the specified
module memory map generate a bus error exception.
2. S/U = CPU supervisor or user mode access. User mode accesses to supervisor only addresses have no effect and result
in a cycle termination transfer error.
3. Within the specified module memory map, accessing reserved addresses does not generate a bus error exception. Reads
of reserved addresses return 0s and writes have no effect.
S/U
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Serial Communications Interface Modules (SCI1 and SCI2) 335
For More Information On This Product,
Go to: www.freescale.com