MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
Digital Control
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Freescale Semiconductor, I
Q1
Q2
QS
IDLE
QS = 0011 and QS = 0111, are not shown because they exist only very
briefly between stable status conditions.
The first three examples in Figure 18-23 through Figure 18-25 (S1, S2,
and S3) show what happens when a new trigger event is recognized
before the queue has completed servicing the previous trigger event on
the same queue.
In situation S1 (Figure 18-23), one trigger event is being recognized on
each queue while that queue is still working on the previously recognized
trigger event. The trigger overrun error status bit is set, and otherwise,
the premature trigger event is ignored. A trigger event which occurs
before the servicing of the previous trigger event is through does not
disturb the queue execution in progress.
T1
T1
Q1: C1 C2 C3 C4
TOR1
ACTIVE
CF1
T2
Q2:
C1 C2 C3 C4
TOR2
IDLE ACTIVE IDLE
0000 1000 0000 0010 0000
Figure 18-23. CCW Priority Situation 1
T2
IDLE
CF2
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Queued Analog-to-Digital Converter (QADC) 455
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