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MMC2107 - Freescale Semiconductor

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External Bus Interface Module (EBI)<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

19.2 Introduction<br />

19.8 Bus Exception Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . .516<br />

19.8.1 Transfer Error Termination . . . . . . . . . . . . . . . . . . . . . . . . .516<br />

19.8.2 Transfer Abort Termination . . . . . . . . . . . . . . . . . . . . . . . .516<br />

19.9 Emulation Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .516<br />

19.9.1 Emulation Chip-Selects (CSE[1:0]) . . . . . . . . . . . . . . . . . .516<br />

19.9.2 Internal Data Transfer Display (Show Cycles) . . . . . . . . . .517<br />

19.9.3 Show Strobe (SHS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .518<br />

19.10 Bus Monitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .519<br />

19.11 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .520<br />

The external bus interface (EBI) module is responsible for controlling the<br />

transfer of information between the internal M•CORE local bus and<br />

external address space. The external bus has 23 address lines and 32<br />

data lines.<br />

In master mode and emulation mode, the EBI functions as a bus master<br />

and allows internal bus cycles to access external resources. In<br />

single-chip mode, the EBI is active, but the external data bus is not<br />

available, and no external data or termination signals are transferred to<br />

the internal bus.<br />

The EBI supports data transfers to both 32-bit and 16-bit ports.<br />

Chip-select channels are programmed to define the port size for specific<br />

address ranges. When no chip-select is active during an external data<br />

transfer, the port size is assumed to be 32 bits.<br />

The EBI supports a variable length external bus cycle to accommodate<br />

the access speed of any device. During an external data transfer, the<br />

EBI drives the address pins, byte enable pins, output enable pins, size<br />

pins, and read/write pins. Wait states are inserted until the bus cycle is<br />

terminated by the assertion of the internal transfer acknowledge signal<br />

by a chip-select channel or by the assertion of the external TA or TEA<br />

pins. The minimum external bus cycle is one clock.<br />

Technical Data <strong>MMC2107</strong> – Rev. 2.0<br />

504 External Bus Interface Module (EBI) MOTOROLA<br />

For More Information On This Product,<br />

Go to: www.freescale.com

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