MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
Digital Control
Situations S10 and S11 (Figure 18-32 and Figure 18-33) show that
when an additional trigger event is detected for queue 2 while the queue
is suspended, the trigger overrun error bit is set, the same as if queue 2
were being executed when a new trigger event occurs. Trigger overrun
on queue 2 thus permits the software to know that queue 1 is taking up
so much QADC time that queue 2 trigger events are being lost.
T1
T1
Q1:
C1
C2
C3
C4
nc...
Freescale Semiconductor, I
Q1
Q2
QS
T2
T2 PF1
T2 T2 CF1
Q2: C1 C2
C1 C2
C3
C3 C4
RESUME = 0
TOR2
PF2
TOR2
CF2
IDLE ACTIVE
PAUSE
ACTIVE
IDLE
IDLE ACTIVE SUSPEND ACTIVE PAUSE ACT SUSPEND ACTIVE IDLE
0000 0010 1010 0110 0101 0110 1010 0010
0000
Figure 18-32. CCW Priority Situation 10
T1
T1
Q1: C1 C2
C3 C4
T2
T2 PF1
T2
T2 CF1
Q2: C1 C2 C2
C3 C4 C4 RESUME = 1
TOR2
PF2
TOR2
CF2
Q1
IDLE ACTIVE
PAUSE
ACTIVE
IDLE
Q2
IDLE ACTIVE SUSPEND ACT PAUSE ACTIVE SUSPEND ACT IDLE
QS
0000 0010 1010 0110 0101 0110 1010 0010
0000
Figure 18-33. CCW Priority Situation 11
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Queued Analog-to-Digital Converter (QADC) 461
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