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MMC2107 - Freescale Semiconductor

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Chip Configuration Module (CCM)<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

SZEN — TSIZ[1:0] Enable Bits<br />

This read/write bit enables the TSIZ[1:0] function of the external pins.<br />

1 = TSIZ[1:0] function enabled<br />

0 = TSIZ[1:0] function disabled<br />

PSTEN — PSTAT[3:0] Signal Enable Bits<br />

This read/write bit enables the PSTAT[3:0] function of the external<br />

pins.<br />

1 = PSTAT[3:0] function enabled<br />

0 = PSTAT[3:0] function disabled<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

NOTE:<br />

SHINT — Show Interrupt Bit<br />

The SHINT bit allows visibility to any active interrupt request to the<br />

processor. If the SHINT bit is set, the RSTOUT pin is the OR of the<br />

fast and normal interrupt signals.<br />

1 = Internal requests reflected on RSTOUT pin<br />

0 = Normal RSTOUT pin function<br />

The SHINT bit is read/write always.<br />

The FRCRSTOUT function in the reset controller has a higher priority<br />

than the SHINT function.<br />

BME — Bus Monitor External Enable Bit<br />

The BME bit enables the bus monitor to operate during external bus<br />

cycles.<br />

1 = Bus monitor enabled on external bus cycles<br />

0 = Bus monitor disabled on external bus cycles<br />

Table 3-2 shows the read/write accessibility of this write-once bit.<br />

BMD — Bus Monitor Debug Mode Bit<br />

The BMD bit controls how the bus monitor responds during debug<br />

mode.<br />

1 = Bus monitor enabled in debug mode<br />

0 = Bus monitor disabled in debug mode<br />

This bit is read/write always.<br />

Technical Data <strong>MMC2107</strong> – Rev. 2.0<br />

96 Chip Configuration Module (CCM) MOTOROLA<br />

For More Information On This Product,<br />

Go to: www.freescale.com

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