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MMC2107 - Freescale Semiconductor

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<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

Timer Modules (TIM1 and TIM2)<br />

Memory Map and Registers<br />

15.7.16 Pulse Accumulator Flag Register<br />

Address: TIM1 — 0x00ce_0019<br />

TIM2 — 0x00cf_0019<br />

Bit 7 6 5 4 3 2 1 Bit 0<br />

Read: 0 0 0 0 0 0<br />

Write:<br />

PAOVF<br />

PAIF<br />

Reset: 0 0 0 0 0 0 0 0<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

Read: Anytime<br />

= Writes have no effect and the access terminates without a transfer error exception.<br />

Figure 15-20. Pulse Accumulator Flag Register (TIMPAFLG)<br />

Write: Anytime; writing 1 clears the flag; writing 0 has no effect<br />

PAOVF — Pulse Accumulator Overflow Flag<br />

PAOVF is set when the 16-bit pulse accumulator rolls over from<br />

$FFFF to $0000. If the PAOVI bit in TIMPACTL is also set, PAOVF<br />

generates an interrupt request. Clear PAOVF by writing a 1 to it.<br />

1 = Pulse accumulator overflow<br />

0 = No pulse accumulator overflow<br />

PAIF — Pulse Accumulator Input Flag<br />

PAIF is set when the selected edge is detected at the PAI pin. In event<br />

counter mode, the event edge sets PAIF. In gated time accumulation<br />

mode, the trailing edge of the gate signal at the PAI pin sets PAIF. If<br />

the PAI bit in TIMPACTL is also set, PAIF generates an interrupt<br />

request. Clear PAIF by writing a 1 to it.<br />

1 = Active PAI input<br />

0 = No active PAI input<br />

NOTE:<br />

When the fast flag clear all enable bit, TFFCA, is set, any access to the<br />

pulse accumulator counter registers clears all the flags in TIMPAFLG.<br />

<strong>MMC2107</strong> – Rev. 2.0<br />

Technical Data<br />

MOTOROLA Timer Modules (TIM1 and TIM2) 317<br />

For More Information On This Product,<br />

Go to: www.freescale.com

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