MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
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Freescale Semiconductor, I
NOTE:
When the timer channel 3 registers contain $FFFF and TCRE is set,
TOF never gets set even though the timer counter registers go from
$FFFF to $0000.
PR[2:0] — Prescaler Bits
These bits select the prescaler divisor for the timer counter.
Table 15-5. Prescaler Selection
PR[2:0]
Prescaler Divisor
000 1
001 2
010 4
011 8
100 16
101 32
110 64
111 128
The newly selected prescaled clock does not take effect until the next
synchronized edge of the prescaled clock when the clock count
transitions to $0000.)
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Timer Modules (TIM1 and TIM2) 311
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