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MMC2107 - Freescale Semiconductor

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<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

JTAG Test Access Port and OnCE<br />

Top-Level Test Access Port (TAP)<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

NOTE:<br />

As an input, this signal provides multiple functions such as:<br />

• The main function is a means of entering debug mode from an<br />

external command controller. This signal, when asserted, causes<br />

the CPU to finish the current instruction being executed, save the<br />

instruction pipeline information, enter debug mode, and wait for<br />

commands to be entered from the serial debug input line. This<br />

input must be asserted for at least three system clocks, sampled<br />

with the rising CLKOUT edge. This function is ignored during<br />

reset. While the processor is in debug mode, this signal is still<br />

sampled but has no effect until debug mode is exited.<br />

• Another input function is to enable OnCE. This is an alternate<br />

method to the ENABLE_MCU_ONCE JTAG command to enable<br />

the OnCE logic to be accessible via the JTAG interface. This input<br />

signal must be asserted low (while in the test-logic-reset state with<br />

POR/TRST not asserted) for at least two TCLK rising edges. Once<br />

enabled, the OnCE will remain enabled until the next POR or<br />

TRST resets.<br />

• Another input function is as a wake-up event from a low-power<br />

mode of operation. Asynchronously asserting this signal will cause<br />

the clock controller to restart. This signal must be held asserted<br />

until the M•CORE receives three valid rising edges on the system<br />

clock. Then the processor will exit the low-power mode and go into<br />

debug mode.<br />

If used to enter debug mode, DE must be pulled negated before the<br />

processor exits debug mode to prevent a still low signal from being<br />

unintentionally recognized as another debug request. Also, asserting<br />

this signal to enter debug mode may prevent external logic from seeing<br />

the processor output acknowledgment since the external pullup may not<br />

be able to pull the signal negated before the handshake is asserted.<br />

Finally, if using this signal to enable OnCE outside of reset it may be<br />

seen as a request to enter debug mode.<br />

<strong>MMC2107</strong> – Rev. 2.0<br />

Technical Data<br />

MOTOROLA JTAG Test Access Port and OnCE 539<br />

For More Information On This Product,<br />

Go to: www.freescale.com

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