MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
Functional Description
BEGIN TRANSMISSION
END TRANSMISSION
SCK (CPOL = 0)
SCK (CPOL = 1)
nc...
Freescale Semiconductor, I
SAMPLE INPUT
MOSI/MISO
CHANGE OUTPUT
MOSI PIN
CHANGE OUTPUT
MISO PIN
SS PIN OUTPUT
MASTER ONLY
SLAVE SS PIN
MSB FIRST (LSBFE = 0):
LSB FIRST (LSBFE = 1):
NOTE:
t L
MSB
LSB
Bit 6
Bit 1
Bit 5
Bit 2
Figure 17-12. SPI Clock Format 0 (CPHA = 0)
When CPHA = 0, the slave SS pin must be negated and reasserted
between bytes.
Clock skew between the master and slave can cause data to be lost
when:
• CPHA = 0, and,
Bit 4
Bit 3
Bit 3
Bit 4
Legend:
t L = Minimum leading time before the first SCK edge
t T = Minimum trailing time after the last SCK edge
t I = Minimum idling time between transmissions (minimum SS high time)
t L , t T , and t I are guaranteed for master mode and required for slave mode.
Bit 2
Bit 5
LSB
MSB
• The baud rate is the SPI clock divided by two, and
• The master SCK frequency is half the slave SPI clock frequency,
and
• Software writes to the slave SPIDR just before the synchronized
SS signal goes low.
Bit 1
Bit 6
t T
t I
t L
MINIMUM 1/2 SCK
FOR t T , t L , t l
IF NEXT TRANSFER BEGINS HERE
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Serial Peripheral Interface Module (SPI) 391
For More Information On This Product,
Go to: www.freescale.com