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MMC2107 - Freescale Semiconductor

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<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

Queued Analog-to-Digital Converter (QADC)<br />

Digital Control<br />

CCW is executed sequentially until the last CCW in the subqueue is<br />

executed and the pause state is entered. Execution can only continue<br />

with the next CCW, which is the beginning of the next subqueue. A<br />

subqueue cannot be executed a second time before the overall queue<br />

execution has been completed.<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

18.10.1.2 Queue Priority Schemes<br />

Trigger events which occur during the execution of a subqueue are<br />

ignored, except that the trigger overrun flag is set. When a<br />

continuous-scan mode is selected, a trigger event occurring after the<br />

completion of the last subqueue (after the queue completion flag is set),<br />

causes the execution to continue with the first subqueue, starting with<br />

the first CCW in the queue.<br />

When the QADC encounters a CCW with the pause bit set, the queue<br />

enters the paused state after completing the conversion specified in the<br />

CCW with the pause bit. The pause flag is set and a pause software<br />

interrupt may optionally be issued. The status of the queue is shown to<br />

be paused, indicating completion of a subqueue. The QADC then waits<br />

for another trigger event to again begin execution of the next subqueue.<br />

Since there are two conversion command queues and only one A/D<br />

converter, there is a priority scheme to determine which conversion is to<br />

occur. Each queue has a variety of trigger events that are intended to<br />

initiate conversions, and they can occur asynchronously in relation to<br />

each other and other conversions in progress. For example, a queue can<br />

be idle awaiting a trigger event, a trigger event can have occurred, but<br />

the first conversion has not started, a conversion can be in progress, a<br />

pause condition can exist awaiting another trigger event to continue the<br />

queue, and so on.<br />

The following paragraphs and figures outline the prioritizing criteria used<br />

to determine which conversion occurs in each overlap situation.<br />

NOTE:<br />

Each situation in Figure 18-23 through Figure 18-33 are labeled S1<br />

through S19. In each diagram, time is shown increasing from left to right.<br />

The execution of queue 1 and queue 2 (Q1 and Q2) is shown as a string<br />

of rectangles representing the execution time of each CCW in the queue.<br />

In most of the situations, there are four CCWs (labeled C1 to C4) in both<br />

queue 1 and queue 2. In some of the situations, CCW C2 is presumed<br />

<strong>MMC2107</strong> – Rev. 2.0<br />

Technical Data<br />

MOTOROLA Queued Analog-to-Digital Converter (QADC) 453<br />

For More Information On This Product,<br />

Go to: www.freescale.com

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