MMC2107 - Freescale Semiconductor

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Ports Module Freescale Semiconductor, Inc. 11.4.2.4 Port Clear Output Data Registers Writing 0s to a port clear output data register (CLRx) clears the corresponding bits in PORTx. Writing 1s has no effect. Reading CLRx returns 0s. CLRx are read/write registers when not in emulation mode. nc... Freescale Semiconductor, I Address: 0x00c0_0024 — CLRA 0x00c0_0025 — CLRB 0x00c0_0026 — CLRC 0x00c0_0027 — CLRD 0x00c0_0028 — CLRE 0x00c0_0029 — CLRF 0x00c0_002a — CLRG 0x00c0_002b — CLRH 0x00c0_002c — CLRI Bit 7 6 5 4 3 2 1 Bit 0 Read: 0 0 0 0 0 0 0 0 Write: CLRx7 CLRx6 CLRx5 CLRx4 CLRx3 CLRx2 CLRx1 CLRx0 Reset: 0 0 0 0 0 0 0 0 Figure 11-5. Port Clear Output Data Registers (CLRx) Technical Data MMC2107 – Rev. 2.0 254 Ports Module MOTOROLA For More Information On This Product, Go to: www.freescale.com
Freescale Semiconductor, Inc. Ports Module Memory Map and Registers 11.4.2.5 Port C/D Pin Assignment Register The port C/D pin assignment register (PCDPAR) controls the pin function of ports C, D, I7, and I6. PCDPAR is a read/write register when not in emulation mode. Address: 0x00c0_0030 Bit 7 6 5 4 3 2 1 Bit 0 nc... Freescale Semiconductor, I Read: Write: PCDPA 0 0 0 0 0 0 0 Reset: See note 0 0 0 0 0 0 0 = Writes have no effect and the access terminates without a transfer error exception. Note: Reset state determined during reset configuration. PCDPA = 1 except in single-chip mode or when an external boot device is selected with a 16-bit port size in master mode. Figure 11-6. Port C, D, I7, and I6 Pin Assignment Register (PCDPAR) PCDPA — Port C, D, I7, and I6 Pin Assignment Bit 1 = Port C, D, I7, and I6 pins configured for primary function 0 = Port C, D, I7, and I6 pins configured for digital I/O MMC2107 – Rev. 2.0 Technical Data MOTOROLA Ports Module 255 For More Information On This Product, Go to: www.freescale.com
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MMC2107 - Freescale Semiconductor

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