MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
Functional Description
the slave SPI clock frequency, there are two SPI clocks between the fall
of SS and the SCK edge.
As long as another late SPIDR write does not occur, the following bytes
to and from the slave are correctly transmitted.
17.8.4 SPI Baud Rate Generation
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Freescale Semiconductor, I
17.8.5 Slave-Select Output
The baud rate generator divides the SPI clock to produce the SPI baud
clock. The SPPR[6:4] and SPR[2:0] bits in SPIBR select the SPI clock
divisor:
SPI clock divisor = (SPPR + 1) × 2(SPR+1)
where:
SPPR = the value written to bits SPPR[6:4]
SPR = the value written to bits SPR[2:0]
The baud rate generator is active only when the SPI is in master mode
and transmitting. Otherwise, the divider is inactive to reduce I DD current.
The slave-select output feature automatically drives the SS pin low
during transmission to select external devices and drives it high during
idle to deselect external devices. When SS output is selected, the SS
output pin is connected to the SS input pin of the external device.
In master mode only, setting the SSOE bit in SPICR1 and the DDRSP[3]
bit in SPIDDR configures the SS pin as a slave-select output.
Setting the SSOE bit disables the mode fault feature.
NOTE:
Be careful when using the slave-select output feature in a multimaster
system. The mode fault feature is not available for detecting system
errors between masters.
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Serial Peripheral Interface Module (SPI) 393
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