MMC2107 - Freescale Semiconductor

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Timer Modules (TIM1 and TIM2) Freescale Semiconductor, Inc. 15.7.12 Timer Flag Register 1 Address: TIM1 — 0x00ce_000e TIM2 — 0x00cf_000e Bit 7 6 5 4 3 2 1 Bit 0 Read: 0 0 0 0 Write: C3F C2F C1F C0F nc... Freescale Semiconductor, I NOTE: Reset: 0 0 0 0 0 0 0 0 Read: Anytime = Writes have no effect and the access terminates without a transfer error exception. Figure 15-15. Timer Flag Register 1 (TIMFLG1) Write: Anytime; writing 1 clears flag; writing 0 has no effect C[3:0]F — Channel Flags A channel flag is set when an input capture or output compare event occurs. Clear a channel flag by writing a 1 to it. When the fast flag clear all bit, TFFCA, is set, an input capture read or an output compare write clears the corresponding channel flag. TFFCA is in timer system control register 1 (TIMSCR1). When a channel flag is set, it does not inhibit subsequent output compares or input captures. Technical Data MMC2107 – Rev. 2.0 312 Timer Modules (TIM1 and TIM2) MOTOROLA For More Information On This Product, Go to: www.freescale.com
Freescale Semiconductor, Inc. Timer Modules (TIM1 and TIM2) Memory Map and Registers 15.7.13 Timer Flag Register 2 Address: TIM1 — 0x00ce_000f TIM2 — 0x00cf_000f Bit 7 6 5 4 3 2 1 Bit 0 Read: Write: TOF 0 0 0 0 0 0 0 nc... Freescale Semiconductor, I NOTE: Reset: 0 0 0 0 0 0 0 0 Read: Anytime = Writes have no effect and the access terminates without a transfer error exception. Figure 15-16. Timer Flag Register 2 (TIMFLG2) Write: Anytime; writing 1 clears flag; writing 0 has no effect TOF — Timer Overflow Flag TOF is set when the timer counter rolls over from $FFFF to $0000. If the TOI bit in TIMSCR2 is also set, TOF generates an interrupt request. Clear TOF by writing a 1 to it. 1 = Timer overflow 0 = No timer overflow When the timer channel 3 registers contain $FFFF and TCRE is set, TOF never gets set even though the timer counter registers go from $FFFF to $0000. When the fast flag clear all bit, TFFCA, is set, any access to the timer counter registers clears timer flag register 2. The TFFCA bit is in timer system control register 1 (TIMSCR1). When TOF is set, it does not inhibit subsequent overflow events. MMC2107 – Rev. 2.0 Technical Data MOTOROLA Timer Modules (TIM1 and TIM2) 313 For More Information On This Product, Go to: www.freescale.com
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MMC2107 - Freescale Semiconductor

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