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MMC2107 - Freescale Semiconductor

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Ports Module<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

11.4.1 Memory Map<br />

Table 11-1. I/O Port Module Memory Map<br />

Address Bits 31–24 Bits 23–16 Bits 15–8 Bits 7–0 Access (1)<br />

0x00c0_0000 PORTA PORTB PORTC PORTD S/U<br />

0x00c0_0004 PORTE PORTF PORTG PORTH S/U<br />

0x00c0_0008 PORTI Reserved (2) S/U<br />

0x00c0_000c DDRA DDRB DDRC DDRD S/U<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

0x00c0_0010 DDRE DDRF DDRG DDRH S/U<br />

0x00c0_0014 DDRI Reserved (2) S/U<br />

0x00c0_0018 PORTAP/SETA PORTBP/SETB PORTCP/SETC PORTDP/SETD S/U<br />

0x00c0_001c PORTEP/SETE PORTFP/SETF PORTGP/SETG PORTHP/SETH S/U<br />

0x00c0_0020 PORTIP/SETI Reserved (2) S/U<br />

0x00c0_0024 CLRA CLRB CLRC CLRD S/U<br />

0x00c0_0028 CLRE CLRF CLRG CLRH S/U<br />

0x00c0_002c CLRI Reserved (2) S/U<br />

0x00c0_0030 PCDPAR PEPAR Reserved (2) S/U<br />

0x00c0_0034–<br />

0x00c0_003c<br />

Reserved (2)<br />

1. S/U = CPU supervisor or user mode access. User mode accesses to supervisor only addresses have no effect and result<br />

in a cycle termination transfer error.<br />

2. Writes have no effect, reads return 0s, and the access terminates without a transfer error exception.<br />

S/U<br />

Technical Data <strong>MMC2107</strong> – Rev. 2.0<br />

250 Ports Module MOTOROLA<br />

For More Information On This Product,<br />

Go to: www.freescale.com

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