MMC2107 - Freescale Semiconductor

System Memory Map
Freescale Semiconductor, Inc.
Address Register Name Bit Number
Bit 7 6 5 4 3 2 1 Bit 0
0x00c0_0025
Port B Clear Output
Data Register (CLRB)
See page 254.
Read: 0 0 0 0 0 0 0 0
Write: CLRB7 CLRB6 CLRB5 CLRB4 CLRB3 CLRB2 CLRB1 CLRB0
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
0x00c0_0026
Port C Clear Output
Data Register (CLRC)
See page 254.
Read: 0 0 0 0 0 0 0 0
Write: CLRC7 CLRC6 CLRC5 CLRC4 CLRC3 CLRC2 CLRC1 CLRC0
Reset: 0 0 0 0 0 0 0 0
nc...
Freescale Semiconductor, I
0x00c0_0027
0x00c0_0028
0x00c0_0029
0x00c0_002a
0x00c0_002b
Port D Clear Output
Data Register (CLRD)
See page 254.
Port E Clear Output
Data Register (CLRE)
See page 254.
Port F Clear Output
Data Register (CLRF)
See page 254.
Port G Clear Output
Data Register (CLRG)
See page 254.
Port H Clear Output
Data Register (CLRH)
See page 254.
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0 0 0 0 0
Write: CLRD7 CLRD6 CLRD5 CLRD4 CLRD3 CLRD2 CLRD1 CLRD0
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0 0 0 0 0
Write: CLRE7 CLRE6 CLRE5 CLRE4 CLRE3 CLRE2 CLRE1 CLRE0
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0 0 0 0 0
Write: CLRF7 CLRF6 CLRF5 CLRF4 CLRF3 CLRF2 CLRF1 CLRF0
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0 0 0 0 0
Write: CLRG7 CLRG6 CLRG5 CLRG4 CLRG3 CLRG2 CLRG1 CLRG0
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0 0 0 0 0
Write: CLRH7 CLRH6 CLRH5 CLRH4 CLRH3 CLRH2 CLRH1 CLRH0
Reset: 0 0 0 0 0 0 0 0
P = Current pin state U = Unaffected = Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 5 of 34)
Technical Data MMC2107 – Rev. 2.0
58 System Memory Map MOTOROLA
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