MMC2107 - Freescale Semiconductor

System Memory Map
Freescale Semiconductor, Inc.
Address Register Name Bit Number
Bit 15 14 13 12 11 10 9 Bit 8
nc...
Freescale Semiconductor, I
0x00c7_0006
0x00c7_0007
0x00c7_0008
↓
0x00c7_ffff
Watchdog Service
Register (WSR)
See page 279.
Unimplemented
Read:
Write:
WS15 WS14 WS13 WS12 WS11 WS10 WS9 WS8
Reset: 0 0 0 0 0 0 0 0
Read:
Write:
Programmable Interrupt Timer 1 (PIT1) and Programming Interrupt Timer 2 (PIT2)
Note: Addresses for PIT1 are at 0x00c8_#### and addresses for PIT2 are at 0x00c9_####.
0x00c8_0000
0x00c8_0001
0x00c9_0000
0x00c9_0001
0x00c8_0002
0x00c8_0003
0x00c9_0002
0x00c9_0003
PIT Control and Status
Register (PCSR)
See page 285.
PIT Modulus Register
(PMR)
See page 288.
Bit 7 6 5 4 3 2 1 Bit 0
WS7 WS6 WS5 WS4 WS3 WS2 WS1 WS0
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Access results in a bus monitor timeout generating an access termination transfer error.
Bit 15 14 13 12 11 10 9 Bit 8
Read: 0 0 0 0
Write:
PRE3 PRE2 PRE1 PRE0
Reset: 0 0 0 0 0 0 0 0
Read: 0
Write:
Bit 7 6 5 4 3 2 1 Bit 0
PDOZE PDBG OVW PIE PIF RLD EN
Reset: 0 0 0 0 0 0 0 0
Read:
Write:
Bit 15 14 13 12 11 10 9 Bit 8
PM15 PM14 PM13 PM12 PM11 PM10 PM9 PM8
Reset: 1 1 1 1 1 1 1 1
Read:
Write:
Bit 7 6 5 4 3 2 1 Bit 0
PM7 PM6 PM5 PM4 PM3 PM2 PM1 PM0
Reset: 1 1 1 1 1 1 1 1
P = Current pin state U = Unaffected = Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 19 of 34)
Technical Data MMC2107 – Rev. 2.0
72 System Memory Map MOTOROLA
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