MMC2107 - Freescale Semiconductor

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System Memory Map Freescale Semiconductor, Inc. Address Register Name Bit Number Edge Port (EPORT) Bit 15 14 13 12 11 10 9 Bit 8 0x00c6_0000 0x00c6_0001 EPORT Pin Assignment Register (EPPAR) See page 264. Read: Write: EPPA7 EPPA6 EPPA5 EPPA4 Reset: 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 Bit 0 Read: Write: EPPA3 EPPA2 EPPA1 EPPA0 nc... Freescale Semiconductor, I 0x00c6_0002 0x00c6_0003 0x00c6_0004 0x00c6_0005 0x00c6_0006 EPORT Data Direction Register (EPDDR) See page 266. EPORT Port Interrupt Enable Register (EPIER) See page 267. EPORT Port Data Register (EPDR) See page 268. EPORT Port Pin Data Register (EPPDR) See page 268. EPORT Port Flag Regiser (EPFR) See page 269. Reset: 0 0 0 0 0 0 0 0 Read: Write: Bit 7 6 5 4 3 2 1 Bit 0 EPDD7 EPDD6 EPDD5 EPDD4 EPDD3 EPDD2 EPDD1 EPDD0 Reset: 0 0 0 0 0 0 0 0 Read: Write: Bit 7 6 5 4 3 2 1 Bit 0 EPIE7 EPIE6 EPIE5 EPIE4 EPIE3 EPIE2 EPIE1 EPIE0 Reset: 0 0 0 0 0 0 0 0 Read: Write: Bit 7 6 5 4 3 2 1 Bit 0 EPD7 EPD6 EPD5 EPD4 EPD3 EPD2 EPD1 EPD0 Reset: 1 1 1 1 1 1 1 1 Bit 7 6 5 4 3 2 1 Bit 0 Read: EPPD7 EPPD6 EPPD5 EPPD4 EPPD3 EPPD2 EPPD1 EPPD0 Write: Reset: P P P P P P P P Read: Write: Bit 7 6 5 4 3 2 1 Bit 0 EPF7 EPF6 EPF5 EPF4 EPF3 EPF2 EPF1 EPF0 Reset: 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 Bit 0 0x00c6_0007 Reserved Writes have no effect, reads return 0s, and the access terminates without a transfer error exception. P = Current pin state U = Unaffected = Writes have no effect and the access terminates without a transfer error exception. Figure 2-2. Register Summary (Sheet 17 of 34) Technical Data MMC2107 – Rev. 2.0 70 System Memory Map MOTOROLA For More Information On This Product, Go to: www.freescale.com
Freescale Semiconductor, Inc. System Memory Map Register Map Address Register Name Bit Number Bit 7 6 5 4 3 2 1 Bit 0 0x00c6_0008 ↓ 0x00c6_ffff Unimplemented Access results in a bus monitor timeout generating an access termination transfer error. Watchdog Timer (WDT) Bit 15 14 13 12 11 10 9 Bit 8 nc... Freescale Semiconductor, I 0x00c7_0000 0x00c7_0001 0x00c7_0002 0x00c7_0003 0x00c7_0004 0x00c7_0005 Watchdog Control Register (WCR) See page 275. Watchdog Modulus Register (WMR) See page 277. Watchdog Count Register (WCNTR) See page 278. Read: 0 0 0 0 0 0 0 0 Write: Reset: 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 Bit 0 Read: 0 0 0 0 Write: WAIT DOZE DBG EN Reset: 0 0 0 0 1 1 1 1 Bit 15 14 13 12 11 10 9 Bit 8 Read: Write: WM15 WM14 WM13 WM12 WM11 WM10 WM9 WM8 Reset: 1 1 1 1 1 1 1 1 Bit 7 6 5 4 3 2 1 Bit 0 Read: Write: WM7 WM6 WM5 WM4 WM3 WM2 WM1 WM0 Reset: 1 1 1 1 1 1 1 1 Bit 15 14 13 12 11 10 9 Bit 8 Read: WC15 WC14 WC13 WC12 WC11 WC10 WC9 WC8 Write: Reset: 1 1 1 1 1 1 1 1 Bit 7 6 5 4 3 2 1 Bit 0 Read: WC7 WC6 WC5 WC4 WC3 WC2 WC1 WC0 Write: Reset: 1 1 1 1 1 1 1 1 P = Current pin state U = Unaffected = Writes have no effect and the access terminates without a transfer error exception. Figure 2-2. Register Summary (Sheet 18 of 34) MMC2107 – Rev. 2.0 Technical Data MOTOROLA System Memory Map 71 For More Information On This Product, Go to: www.freescale.com
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MMC2107 - Freescale Semiconductor

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