MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
System Memory Map
Register Map
Address Register Name Bit Number
Bit 15 14 13 12 11 10 9 Bit 8
nc...
Freescale Semiconductor, I
0x00ca_0300
0x00ca_037e
0x00ca_0380
0x00ca_03fe
0x00ca_0400
↓
0x00ca_ffff
Left-Justified Signed
Result Register (LJSRR)
See page 442.
Left-Justified Unsigned
Result Register (LJURR)
See page 442.
Serial Peripheral Interface (SPI)
0x00cb_0000
0x00cb_0001
Unimplemented
SPI Control Register 1
(SPICR1)
See page 376.
SPI Control Register 2
(SPICR2)
See page 378.
Read:
Write:
Reset:
S
RESULT
Bit 7 6 5 4 3 2 1 Bit 0
Read:
0 0 0 0 0 0
RESULT
Write:
Reset: 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 Bit 8
Read:
RESULT
Write:
Reset:
Bit 7 6 5 4 3 2 1 Bit 0
Read:
0 0 0 0 0 0
RESULT
Write:
Reset: 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Access results in a bus monitor timeout generating an access termination transfer error.
Bit 7 6 5 4 3 2 1 Bit 0
Read:
Write:
SPIE SPE SWOM MSTR CPOL CPHA SSOE LSBFE
Reset: 0 0 0 0 0 1 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0 0 0
Write:
SPISDOZ SPC0
Reset: 0 0 0 0 0 0 0 0
P = Current pin state U = Unaffected = Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 24 of 34)
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA System Memory Map 77
For More Information On This Product,
Go to: www.freescale.com