28.10.2014 Views

MMC2107 - Freescale Semiconductor

MMC2107 - Freescale Semiconductor

MMC2107 - Freescale Semiconductor

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Non-Volatile Memory FLASH (CMFR)<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />

Table 9-10 Erase Interlock State Descriptions (Continued)<br />

State<br />

Mode<br />

Next<br />

State<br />

Transition Requirement<br />

nc...<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, I<br />

S3<br />

S4<br />

S5<br />

High voltage write enable: Erase margin<br />

reads occur. CMFR accepts erase hardware<br />

interlock write. Normal register accesses<br />

(except CMFRMCR). CMFRMCR write<br />

causes NVM fuses to be cleared during the<br />

high-voltage pulse. If CMFRMCR was<br />

written, a CMFRMCR read returns the NVM<br />

fuses value. CMFRCTL write can change<br />

EHV. When HVS goes high, NVR and<br />

PAWS are locked.<br />

Erase operation: High voltage applied to<br />

array blocks to erase bitcells. Pulse-width<br />

timer active if SCLKR[2:0] ≠ 0; HVS can be<br />

polled to time the erase pulse. During erase,<br />

array cannot be accessed (bus error).<br />

Normal register accesses. CMFRCTL write<br />

can change only EHV.<br />

Erase margin read operation: Reads<br />

determine if bits in selected blocks need<br />

modification by the erase operation. Erased<br />

bit reads as 1. All words in erased blocks<br />

must be read to determine if erase is<br />

complete.<br />

9.8.5.2 Erase Margin Reads<br />

S1<br />

T6 Write SES = 0 or a master reset<br />

S4 T4 Write EHV = 1<br />

S1<br />

T7 Master reset<br />

S5 T5 EHV = 0 and HVS = 0<br />

S4 T8 Write EHV = 1<br />

S1<br />

T9 Write SES = 0 or a master reset<br />

The CMFR provides an erase margin read with electrical margin for the<br />

erase state. Erase margin reads provide sufficient margin to assure<br />

specified data retention. The erase margin read is enabled when<br />

SES = 1 and the erase write has occurred. The erase margin read and<br />

subsequent on-page erase verify reads return a 0 for any bit that has not<br />

completely erased. Bits that have completed erasing read as a 1s. To<br />

increase the access time of the erase margin read, the off-page access<br />

time is 17 clocks instead of the usual 2-clock off-page read access time.<br />

The erase margin read occurs while doing an off-page read. All locations<br />

within the block(s) that are being erased must read as a 1 to determine<br />

that no more erase pulses are required.<br />

Technical Data <strong>MMC2107</strong> – Rev. 2.0<br />

218 Non-Volatile Memory FLASH (CMFR) MOTOROLA<br />

For More Information On This Product,<br />

Go to: www.freescale.com

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!