MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
System Memory Map
Register Map
Address Register Name Bit Number
Bit 15 14 13 12 11 10 9 Bit 8
0x00c1_0006
0x00c1_0007
Chip Identification
Register (CIR)
See page 99.
Read: 0
PIN7
Write:
0
PIN6
0
PIN5
1
PIN4
0
PIN3
1
PIN2
1
PIN1
1
PIN0
Reset: 0 0 0 1 0 1 1 1
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0
PRN7
0
PRN6
0
PRN5
0
PRN4
0
PRN3
0
PRN2
0
PRN1
0
PRN0
Write:
nc...
Reset: 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 Bit 8
Freescale Semiconductor, I
0x00c1_0008
0x00c1_0009
0x00c1_000a
0x00c1_000b
0x00c1_000c
↓
0x00c1_000f
0x00c1_0010
↓
0x00c1_ffff
Chip Test Register
(CTR)
See page 100.
Reserved
Unimplemented
Unimplemented
Read: 0 0 0 0 0 0 0 0
Write:
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0 0 0 0 0
Write:
Reset: 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 Bit 0
Writes have no effect, reads return 0s, and the access terminates
without a transfer error exception.
Bit 7 6 5 4 3 2 1 Bit 0
Access results in the module generating an access termination transfer error.
Bit 7 6 5 4 3 2 1 Bit 0
Access results in a bus monitor timeout generating an access termination transfer error.
P = Current pin state U = Unaffected = Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 8 of 34)
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA System Memory Map 61
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