MMC2107 - Freescale Semiconductor

JTAG Test Access Port and OnCE
Freescale Semiconductor, Inc.
Table 21-3. Boundary-Scan Register Definition (Sheet 4 of 4)
(Note: Shaded regions indicate optional pins)
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Freescale Semiconductor, I
Bit
Logical State and Direction
Control Bits for Each Pin
154 D15 logical state 177 A8 direction control
155 D15 direction control 178 A9 logical state
156 A5 logical state 179 A9 direction control
157 A5 direction control 180 D23 logical state
158 D16 logical state 181 D23 direction control
159 D16 direction control 182 A10 logical state
160 A6 logical state 183 A10 direction control
161 A6 direction control 184 D24 logical state
162 A7 logical state 185 D24 direction control
163 A7 direction control 186 D25 logical state
164 D17 logical state 187 D25 direction control
165 D17 direction control 188 A11 logical state
166 D18 logical state 189 A11 direction control
167 D18 direction control 190 D26 logical state
168 D19 logical state 191 D16 direction control
169 D19 direction control 192 D27 logical state
170 D20 logical state 193 D27 direction control
171 D20 direction control 194 D28 logical state
172 D21 logical state 195 D28 direction control
173 D21 direction control 196 D29 logical state
174 D22 logical state 197 D29 direction control
175 D22 direction control 198 D30 logical state
176 A8 logical state 199 D30 direction control
Bit
Logical State and Direction
Control Bits for Each Pin
Technical Data MMC2107 – Rev. 2.0
552 JTAG Test Access Port and OnCE MOTOROLA
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