MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Electrical Specifications
Reset and Configuration Override Timing
22.12 Reset and Configuration Override Timing
Table 22-12. Reset and Configuration Override Timing
(V DD = 2.7 to 3.6 V, V SS = 0 V, T A = T L to T H )
No. Parameter (1) Symbol Min Max Unit
R1 RESET input asserted to CLKOUT high t RACH 10 — ns
R2 CLKOUT high to RESET input negated t CHRN 2 — ns
R3 RESET input assertion time (2) t RIAT 5 — t cyc
nc...
Freescale Semiconductor, I
R4 CLKOUT high to RSTOUT valid (3) t CHROV — 20 ns
R5 RSTOUT asserted to config. overrides asserted t ROACA 0 — ns
R6 Configuration override setup time to RSTOUT negated t COS 20 — t cyc
R7 Configuration override hold time after RSTOUT negated t COH 0 — ns
R8
RSTOUT negated to configuration override high
impedance
t RONCZ — 1 t cyc
1. All AC timing is shown with respect to 20% V DD and 80% V DD levels, unless otherwise noted.
2. During low-power STOP, the synchronizers for the RESET input are bypassed and RESET is asserted asynchronously to
the system. Thus, RESET must be held a minimum of 100 ns.
3. This parameter also covers the timing of the show interrupt function.
CLKOUT
RESET
RSTOUT
CONFIGURATION OVERRIDES
(RCON, D[28, 26, 23:21, 19:16])
R1
R3
R2
R4
R5
R6
R4
R7
R8
Figure 22-7. RESET and Configuration Override Timing
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Electrical Specifications 601
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